Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
E
e7020e_2019
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
August Svensson
e7020e_2019
Commits
cc3d2dd1
Commit
cc3d2dd1
authored
6 years ago
by
August Svensson
Browse files
Options
Downloads
Patches
Plain Diff
bare6_3
parent
e8feca72
No related branches found
No related tags found
No related merge requests found
Changes
2
Show whitespace changes
Inline
Side-by-side
Showing
2 changed files
examples/bare6.rs
+1
-1
1 addition, 1 deletion
examples/bare6.rs
openocd.gdb
+1
-1
1 addition, 1 deletion
openocd.gdb
with
2 additions
and
2 deletions
examples/bare6.rs
+
1
−
1
View file @
cc3d2dd1
...
...
@@ -166,7 +166,7 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
//`
// What is the frequency of blinking?
//
// **
your answer here
**
// **
Period of 1.008 ("on" to "on"), 0.9921 Hz.
**
//
// Commit your answers (bare6_3)
//
...
...
This diff is collapsed.
Click to expand it.
openocd.gdb
+
1
−
1
View file @
cc3d2dd1
...
...
@@ -16,7 +16,7 @@ monitor arm semihosting enable
# send captured ITM to the file (fifo) /tmp/itm.log
# (the microcontroller SWO pin must be connected to the programmer SWO pin)
# 16000000 must match the core clock frequency
monitor tpiu config internal /tmp/itm.log uart off 16000000
monitor tpiu config internal /tmp/itm.log uart off
64000000 #
16000000
# OR: make the microcontroller SWO pin output compatible with UART (8N1)
# 8000000 must match the core clock frequency
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment