diff --git a/examples/bare6.rs b/examples/bare6.rs
index 4c9824af0383e54d7f29246ef1576583f41d51a3..1df2836652ec697b9af7be94ce9027240caaac91 100644
--- a/examples/bare6.rs
+++ b/examples/bare6.rs
@@ -166,7 +166,7 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
 //`
 //    What is the frequency of blinking?
 //
-//    ** your answer here **
+//    ** Period of 1.008 ("on" to "on"), 0.9921 Hz. **
 //
 //    Commit your answers (bare6_3)
 //
diff --git a/openocd.gdb b/openocd.gdb
index 46b34b908e55412d05de8e077e8fe1ac55fe4712..9ccafb36ffde58f3649d0b8226d32ffa1afe1a31 100644
--- a/openocd.gdb
+++ b/openocd.gdb
@@ -16,7 +16,7 @@ monitor arm semihosting enable
 # send captured ITM to the file (fifo) /tmp/itm.log
 # (the microcontroller SWO pin must be connected to the programmer SWO pin)
 # 16000000 must match the core clock frequency
-monitor tpiu config internal /tmp/itm.log uart off 16000000
+monitor tpiu config internal /tmp/itm.log uart off 64000000 #16000000
 
 # OR: make the microcontroller SWO pin output compatible with UART (8N1)
 # 8000000 must match the core clock frequency