From cc3d2dd1eef90773061752101efc43c969d8ca3b Mon Sep 17 00:00:00 2001
From: sheepwall <a.sve@live.se>
Date: Wed, 13 Mar 2019 13:25:11 +0100
Subject: [PATCH] bare6_3
---
examples/bare6.rs | 2 +-
openocd.gdb | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/examples/bare6.rs b/examples/bare6.rs
index 4c9824a..1df2836 100644
--- a/examples/bare6.rs
+++ b/examples/bare6.rs
@@ -166,7 +166,7 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
//`
// What is the frequency of blinking?
//
-// ** your answer here **
+// ** Period of 1.008 ("on" to "on"), 0.9921 Hz. **
//
// Commit your answers (bare6_3)
//
diff --git a/openocd.gdb b/openocd.gdb
index 46b34b9..9ccafb3 100644
--- a/openocd.gdb
+++ b/openocd.gdb
@@ -16,7 +16,7 @@ monitor arm semihosting enable
# send captured ITM to the file (fifo) /tmp/itm.log
# (the microcontroller SWO pin must be connected to the programmer SWO pin)
# 16000000 must match the core clock frequency
-monitor tpiu config internal /tmp/itm.log uart off 16000000
+monitor tpiu config internal /tmp/itm.log uart off 64000000 #16000000
# OR: make the microcontroller SWO pin output compatible with UART (8N1)
# 8000000 must match the core clock frequency
--
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