bare8_1

examples/bare8.rs

@@ -114,7 +114,7 @@ const APP: () = {
 //
 // 1. Our CPU now runs slower, did it effect the behavior?
 //
-//    ** your answer here **
+//    Yes
 //
 //    Commit your answer (bare8_1)
 //

openocd.gdb

@@ -16,7 +16,7 @@ monitor arm semihosting enable
 # send captured ITM to the file (fifo) /tmp/itm.log
 # (the microcontroller SWO pin must be connected to the programmer SWO pin)
 # 16000000 must match the core clock frequency
-monitor tpiu config internal /tmp/itm.log uart off 16000000
+monitor tpiu config internal test uart off 16000000
 
 # OR: make the microcontroller SWO pin output compatible with UART (8N1)
 # 8000000 must match the core clock frequency

test

+Ok
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+Ok
 
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+Ok
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