bare7_1

examples/bare7.rs

@@ -125,11 +125,12 @@ fn main() -> ! {
 //
 //    rcc.cfgr.sysclk(64.mhz()).pclk1(64.mhz()).pclk2(64.mhz()).freeze();
 //
-//    ** your answer here **
+//    Max frequency for pclk1 is 42 MHz, and hclk must be specified to the same value as
+//    sysclk / 1 which it is not right now so it's being defaulted to 16 MHz.
 //
 //    rcc.cfgr.sysclk(84.mhz()).pclk1(42.mhz()).pclk2(64.mhz()).freeze();
 //
-//    ** your answer here **
+//    Only wrong in this configuration is that hclk will not be set to sysclk / 1 as it should be.
 //
 //    Commit your answers (bare7_1)
 //