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Commit eb956b5c authored by Daniel Björk's avatar Daniel Björk
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USART and IMU DMA info added

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\subsection{USART - Universal Synchronous/Asynchronous \\Receiver/Transmitter}
The built in USART in the \href{http://www.st.com/en/evaluation-tools/nucleo-f767zi.html}{STM32F7-NUCLEO}
supports several communication standards for data transmission. Among these are RS-232 which requires two
extra lines for communication. A Ready To Send (RTS) and a Clear To Send (CTS), which adds a layer of
hardware flow control.
The built in USART in the \href{http://www.st.com/en/evaluation-tools/nucleo-f767zi.html}{STM32F7-NUCLEO} supports several communication standards for data transmission. Among these are RS-232 which requires two extra lines for communication. A Ready To Send (RTS) and a Clear To Send (CTS), which adds a layer of hardware flow control.
The processor also support Direct Memory Access(DMA). This automates the buffering of transmitted bytes, which relieves the processor of executing code to fetch each byte and store it in a buffer. This can be done both while transmitting and receiving data.
......@@ -13,6 +13,9 @@
The data received \texttt{8bits} at a time. Each data point transmitted contains \texttt{32bits}, formatted as a standard \texttt{IEEE 754 float}. The data is shifted into a temporary \texttt{32bit unsigned int} and then a \texttt{memcpy()} is executed from the \texttt{int} to a \texttt{float}. The data points are then sent over to \texttt{MSP} and stored.
Due to the high transmission rate of the MTi, DMA buffering has been implemented to relieve
the processor of constant code execution of receiving each byte. However transmission to the MTi is interrupt driven, due to the small amount of data that has to be sent. Something which is only executed upon launch, to configure the MTi.
\begin{table}[H]
\begin{center}
\begin{tabular}{ l l }
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