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August Svensson
e7020e_2019
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ee8d092a
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ee8d092a
authored
6 years ago
by
August Svensson
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bare7_4 (alse added 1 part to bare7_3)
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d1f77301
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examples/bare7.rs
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examples/bare7.rs
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ee8d092a
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@@ -183,7 +183,12 @@ fn main() -> ! {
...
@@ -183,7 +183,12 @@ fn main() -> ! {
//
//
// What is the peak to peak reading of the signal (and why did it change)?
// What is the peak to peak reading of the signal (and why did it change)?
//
//
// ** Zero at MCO2 = 84 MHz and low_speed mode. 3.95 V at MCO = 21 MHz. **
// ** Zero at MCO2 = 84 MHz and low_speed mode. 3.95 V at MCO = 21 MHz.
// The voltage changed because more current is required to drive the CLK up and
// down at higher frequency. The speed setting exists to be able to conserve
// power when only little power is needed, i.e. at low frequencies. The current
// in the low speed setting can't drive the CLK all the way up to nominal voltage,
// charge, that fast. **
//
//
// Make a screen dump or photo of the oscilloscope output.
// Make a screen dump or photo of the oscilloscope output.
// Save the the picture as "bare_6_84mhz_low_speed".
// Save the the picture as "bare_6_84mhz_low_speed".
...
@@ -220,8 +225,11 @@ fn main() -> ! {
...
@@ -220,8 +225,11 @@ fn main() -> ! {
//
//
// Explain why the buffer overflows.
// Explain why the buffer overflows.
//
//
// ** There was no buffer overflow. I wrote 496 bytes, it failed after 336 ITM outputs.
// ** There was no buffer overflow. I instead wrote 496 bytes, it failed after 336 ITM
// It failed to echo after 425 characters. **
// outputs. It failed to echo after 425 characters. It fails because the readout (and write)
// of the registers take time, and if bytes are added faster than the cpu reads them, the
// register can be cleared to make way for new incoming bytes even before all bytes
// have been read by the program. **
//
//
// commit your answers (bare7_4)
// commit your answers (bare7_4)
//
//
...
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