From ee8d092a221548f9565d1c640a9f09a39e55e89d Mon Sep 17 00:00:00 2001
From: sheepwall <a.sve@live.se>
Date: Fri, 15 Mar 2019 08:57:39 +0100
Subject: [PATCH] bare7_4 (alse added 1 part to bare7_3)
---
examples/bare7.rs | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/examples/bare7.rs b/examples/bare7.rs
index bde535f..e2bc5d4 100644
--- a/examples/bare7.rs
+++ b/examples/bare7.rs
@@ -183,7 +183,12 @@ fn main() -> ! {
//
// What is the peak to peak reading of the signal (and why did it change)?
//
-// ** Zero at MCO2 = 84 MHz and low_speed mode. 3.95 V at MCO = 21 MHz. **
+// ** Zero at MCO2 = 84 MHz and low_speed mode. 3.95 V at MCO = 21 MHz.
+// The voltage changed because more current is required to drive the CLK up and
+// down at higher frequency. The speed setting exists to be able to conserve
+// power when only little power is needed, i.e. at low frequencies. The current
+// in the low speed setting can't drive the CLK all the way up to nominal voltage,
+// charge, that fast. **
//
// Make a screen dump or photo of the oscilloscope output.
// Save the the picture as "bare_6_84mhz_low_speed".
@@ -220,8 +225,11 @@ fn main() -> ! {
//
// Explain why the buffer overflows.
//
-// ** There was no buffer overflow. I wrote 496 bytes, it failed after 336 ITM outputs.
-// It failed to echo after 425 characters. **
+// ** There was no buffer overflow. I instead wrote 496 bytes, it failed after 336 ITM
+// outputs. It failed to echo after 425 characters. It fails because the readout (and write)
+// of the registers take time, and if bytes are added faster than the cpu reads them, the
+// register can be cleared to make way for new incoming bytes even before all bytes
+// have been read by the program. **
//
// commit your answers (bare7_4)
//
--
GitLab