Skip to content
Snippets Groups Projects
Commit ca3b6546 authored by Per Lindgren's avatar Per Lindgren
Browse files

polishing

parent f848afa1
Branches
No related tags found
No related merge requests found
Show whitespace changes
Inline Side-by-side
Showing
with 116 additions and 403 deletions
.vscode/launch.json
+ 70
− 151
View file @ ca3b6546
...@@ -8,20 +8,37 @@ ...@@ -8,20 +8,37 @@
"type": "cortex-debug", "type": "cortex-debug",
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "itm 64Mhz (debug)", "name": "hello 16Mhz (debug)",
"preLaunchTask": "cargo build --example itm", "preLaunchTask": "cargo build --example hello",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", "executable": "./target/thumbv7em-none-eabihf/debug/examples/hello",
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
"target/stm32f4x.cfg" "target/stm32f4x.cfg"
], ],
"postLaunchCommands": [ "postLaunchCommands": [
// sets the MCU to 64Mhz "monitor arm semihosting enable"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "itm 16Mhz (debug)",
"preLaunchTask": "cargo build --example itm",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"postLaunchCommands": [
// here the MCU remains in 16MHz, since we use our local .cfg files
"monitor reset init" "monitor reset init"
], ],
"swoConfig": { "swoConfig": {
"enabled": true, "enabled": true,
"cpuFrequency": 64000000, "cpuFrequency": 16000000,
"swoFrequency": 2000000, "swoFrequency": 2000000,
"source": "probe", "source": "probe",
"decoders": [ "decoders": [
...@@ -38,16 +55,30 @@ ...@@ -38,16 +55,30 @@
"type": "cortex-debug", "type": "cortex-debug",
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "hello 16Mhz (debug)", "name": "itm 64Mhz (debug)",
"preLaunchTask": "cargo build --example hello", "preLaunchTask": "cargo build --example itm",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/hello", "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
"target/stm32f4x.cfg" "target/stm32f4x.cfg"
], ],
"postLaunchCommands": [ "postLaunchCommands": [
"monitor arm semihosting enable" // sets the MCU to 64Mhz
"monitor reset init"
], ],
"swoConfig": {
"enabled": true,
"cpuFrequency": 64000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}" "cwd": "${workspaceRoot}"
}, },
{ {
...@@ -67,36 +98,6 @@ ...@@ -67,36 +98,6 @@
], ],
"cwd": "${workspaceRoot}" "cwd": "${workspaceRoot}"
}, },
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "itm 16Mhz (debug)",
"preLaunchTask": "cargo build --example itm",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor reset init"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
// launch configuration for using an external itm viewer // launch configuration for using an external itm viewer
// $ tail -f /tmp/itm.log // $ tail -f /tmp/itm.log
// or, prior to launching the bebug session // or, prior to launching the bebug session
...@@ -129,7 +130,7 @@ ...@@ -129,7 +130,7 @@
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "device (debug)", "name": "device (debug)",
"preLaunchTask": "cargo build --example device --features stm32f4", "preLaunchTask": "cargo build --example device",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/device", "executable": "./target/thumbv7em-none-eabihf/debug/examples/device",
// uses local config files // uses local config files
"configFiles": [ "configFiles": [
...@@ -160,16 +161,13 @@ ...@@ -160,16 +161,13 @@
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "serial (debug)", "name": "serial (debug)",
"preLaunchTask": "cargo build --example serial --features stm32f4", "preLaunchTask": "cargo build --example serial",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/serial", "executable": "./target/thumbv7em-none-eabihf/debug/examples/serial",
// uses local config files // uses local config files
"configFiles": [ "configFiles": [
"./stlink.cfg", "./stlink.cfg",
"./stm32f4x.cfg" "./stm32f4x.cfg"
], ],
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": { "swoConfig": {
"enabled": true, "enabled": true,
"cpuFrequency": 16000000, "cpuFrequency": 16000000,
...@@ -384,7 +382,7 @@ ...@@ -384,7 +382,7 @@
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "bare6 (debug) 16Mhz", "name": "bare6 (debug) 16Mhz",
"preLaunchTask": "cargo build --example bare6 --features stm32f4", "preLaunchTask": "cargo build --example bare6",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare6", "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare6",
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
...@@ -412,52 +410,21 @@ ...@@ -412,52 +410,21 @@
"type": "cortex-debug", "type": "cortex-debug",
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "bare7 (debug)", "name": "bare6 (debug) 64Mhz",
"preLaunchTask": "cargo build --example bare7 --features stm32f4", "preLaunchTask": "cargo build --example bare6",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7", "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare6",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare7 (debug) 64MHz",
"preLaunchTask": "cargo build --example bare7 --features stm32f4",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
// uses local config files
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
"target/stm32f4x.cfg" "target/stm32f4x.cfg"
], ],
"postLaunchCommands": [ "postLaunchCommands": [
"monitor reset halt" // put the MCU in 64MHz
"monitor reset init"
], ],
"swoConfig": { "swoConfig": {
"enabled": true, "enabled": true,
"cpuFrequency": 64000000, "cpuFrequency": 64000000,
"swoFrequency": 2000000, "swoFrequency": 2000000, // you may try 1000000 if not working
"source": "probe", "source": "probe",
"decoders": [ "decoders": [
{ {
...@@ -467,27 +434,26 @@ ...@@ -467,27 +434,26 @@
} }
] ]
}, },
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}" "cwd": "${workspaceRoot}"
}, },
{ {
"type": "cortex-debug", "type": "cortex-debug",
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "bare7 (debug) 84MHz", "name": "bare7 (debug) 16MHz",
"preLaunchTask": "cargo build --example bare7 --features stm32f4", "preLaunchTask": "cargo build --example bare7",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7", "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
// uses local config files // uses local config files
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "./stlink.cfg",
"target/stm32f4x.cfg" "./stm32f4x.cfg"
], ],
"postLaunchCommands": [ "postLaunchCommands": [
"monitor reset halt" "monitor arm semihosting enable"
], ],
"swoConfig": { "swoConfig": {
"enabled": true, "enabled": true,
"cpuFrequency": 84000000, "cpuFrequency": 16000000,
"swoFrequency": 2000000, "swoFrequency": 2000000,
"source": "probe", "source": "probe",
"decoders": [ "decoders": [
...@@ -505,20 +471,20 @@ ...@@ -505,20 +471,20 @@
"type": "cortex-debug", "type": "cortex-debug",
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "bare6 (debug) 64Mhz", "name": "bare7 (debug) 64MHz",
"preLaunchTask": "cargo build --example bare6 --features stm32f4", "preLaunchTask": "cargo build --example bare7",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare6", "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
"target/stm32f4x.cfg" "target/stm32f4x.cfg"
], ],
"postLaunchCommands": [ "postLaunchCommands": [
"monitor reset init" "monitor reset halt"
], ],
"swoConfig": { "swoConfig": {
"enabled": true, "enabled": true,
"cpuFrequency": 64000000, "cpuFrequency": 64000000,
"swoFrequency": 2000000, // you may try 1000000 if not working "swoFrequency": 2000000,
"source": "probe", "source": "probe",
"decoders": [ "decoders": [
{ {
...@@ -528,26 +494,28 @@ ...@@ -528,26 +494,28 @@
} }
] ]
}, },
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}" "cwd": "${workspaceRoot}"
}, },
{ {
"type": "cortex-debug", "type": "cortex-debug",
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "bare6 (debug) 84Mhz", "name": "bare7 (debug) 84MHz",
"preLaunchTask": "cargo build --example bare6 --features stm32f4", "preLaunchTask": "cargo build --example bare7",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare6", "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
// uses local config files
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
"target/stm32f4x.cfg" "target/stm32f4x.cfg"
], ],
"postLaunchCommands": [ "postLaunchCommands": [
"monitor reset init" "monitor reset halt"
], ],
"swoConfig": { "swoConfig": {
"enabled": true, "enabled": true,
"cpuFrequency": 84000000, "cpuFrequency": 84000000,
"swoFrequency": 2000000, // you may try 1000000 if not working "swoFrequency": 2000000,
"source": "probe", "source": "probe",
"decoders": [ "decoders": [
{ {
...@@ -557,56 +525,7 @@ ...@@ -557,56 +525,7 @@
} }
] ]
}, },
"cwd": "${workspaceRoot}" "svdFile": "STM32F413.svd",
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare7 (debug) 16Mhz",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000, // you may try 1000000 if not working
"source": "probe",
"decoders": [
{
"type": "console",
"label": "Name",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "c bare7 16Mhz",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000, // you may try 1000000 if not working
"source": "probe",
"decoders": [
{
"type": "console",
"label": "Name",
"port": 0
}
]
},
"cwd": "${workspaceRoot}" "cwd": "${workspaceRoot}"
}, },
{ {
...@@ -614,7 +533,7 @@ ...@@ -614,7 +533,7 @@
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "bare8 (debug)", "name": "bare8 (debug)",
"preLaunchTask": "cargo build --example bare8 --features stm32f4", "preLaunchTask": "cargo build --example bare8",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare8", "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare8",
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
...@@ -641,7 +560,7 @@ ...@@ -641,7 +560,7 @@
"request": "launch", "request": "launch",
"servertype": "openocd", "servertype": "openocd",
"name": "bare9 (debug)", "name": "bare9 (debug)",
"preLaunchTask": "cargo build --example bare9 --features stm32f4", "preLaunchTask": "cargo build --example bare9",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare9", "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare9",
"configFiles": [ "configFiles": [
"interface/stlink.cfg", "interface/stlink.cfg",
......
.vscode/tasks.json
+ 18
− 18
View file @ ca3b6546
...@@ -75,6 +75,18 @@ ...@@ -75,6 +75,18 @@
"isDefault": true "isDefault": true
} }
}, },
{
"type": "shell",
"label": "cargo build --example serial",
"command": "cargo build --example serial --features \"hal\"",
"problemMatcher": [
"$rustc"
],
"group": {
"kind": "build",
"isDefault": true
}
},
{ {
"type": "shell", "type": "shell",
"label": "cargo build --example rtfm_interrupt --features \"pac rtfm\"", "label": "cargo build --example rtfm_interrupt --features \"pac rtfm\"",
...@@ -197,20 +209,8 @@ ...@@ -197,20 +209,8 @@
}, },
{ {
"type": "shell", "type": "shell",
"label": "cargo build --example bare6 --features stm32f4", "label": "cargo build --example bare6",
"command": "cargo build --example bare6 --features stm32f4", "command": "cargo build --example bare6 --features \"hal\"",
"problemMatcher": [
"$rustc"
],
"group": {
"kind": "build",
"isDefault": true
}
},
{
"type": "shell",
"label": "cargo build --example serial --features stm32f4",
"command": "cargo build --example serial --features stm32f4",
"problemMatcher": [ "problemMatcher": [
"$rustc" "$rustc"
], ],
...@@ -221,8 +221,8 @@ ...@@ -221,8 +221,8 @@
}, },
{ {
"type": "shell", "type": "shell",
"label": "cargo build --example bare7 --features stm32f4", "label": "cargo build --example bare7",
"command": "cargo build --example bare7 --features \"hal pac\"", "command": "cargo build --example bare7 --features \"hal\"",
"problemMatcher": [ "problemMatcher": [
"$rustc" "$rustc"
], ],
...@@ -233,7 +233,7 @@ ...@@ -233,7 +233,7 @@
}, },
{ {
"type": "shell", "type": "shell",
"label": "cargo build --example bare8 --features stm32f4", "label": "cargo build --example bare8",
"command": "cargo build --example bare8 --features \"hal rtfm\"", "command": "cargo build --example bare8 --features \"hal rtfm\"",
"problemMatcher": [ "problemMatcher": [
"$rustc" "$rustc"
...@@ -245,7 +245,7 @@ ...@@ -245,7 +245,7 @@
}, },
{ {
"type": "shell", "type": "shell",
"label": "cargo build --example bare9 --features stm32f4", "label": "cargo build --example bare9",
"command": "cargo build --example bare9 --features \"hal rtfm\"", "command": "cargo build --example bare9 --features \"hal rtfm\"",
"problemMatcher": [ "problemMatcher": [
"$rustc" "$rustc"
......
examples/bare0.rs
+ 1
− 1
View file @ ca3b6546
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
//! - checked vs. wrapping arithmetics //! - checked vs. wrapping arithmetics
//! - safe and unsafe code //! - safe and unsafe code
//! - making a safe API //! - making a safe API
//!
// build without the Rust standard library // build without the Rust standard library
#![no_std] #![no_std]
// no standard main, we declare main using [entry] // no standard main, we declare main using [entry]
......
examples/bare1.rs
+ 0
− 1
View file @ ca3b6546
...@@ -6,7 +6,6 @@ ...@@ -6,7 +6,6 @@
//! - tracing over semihosting and ITM //! - tracing over semihosting and ITM
//! - assembly calls and inline assembly //! - assembly calls and inline assembly
//! - more on arithmetics //! - more on arithmetics
//!
#![no_main] #![no_main]
#![no_std] #![no_std]
......
examples/bare2.rs
+ 1
− 1
View file @ ca3b6546
...@@ -58,7 +58,7 @@ fn main() -> ! { ...@@ -58,7 +58,7 @@ fn main() -> ! {
// 0. Setup // 0. Setup
// > cargo doc --open // > cargo doc --open
// This will document your crate, and open the docs in your browser. // This will document your crate, and open the docs in your browser.
// If it does not auto-open, the copy paste the path in your browser. // If it does not auto-open, then copy paste the path in your browser.
// //
// In the docs, seach (`S`) for DWT, and click `cortex_m::peripheral::DWT`. // In the docs, seach (`S`) for DWT, and click `cortex_m::peripheral::DWT`.
// Read the API docs. // Read the API docs.
......
examples/bare3.rs
+ 0
− 1
View file @ ca3b6546
...@@ -5,7 +5,6 @@ ...@@ -5,7 +5,6 @@
//! What it covers: //! What it covers:
//! - types, str, arrays ([u8;uszie]), slices (&[u8]) //! - types, str, arrays ([u8;uszie]), slices (&[u8])
//! - iteration, copy //! - iteration, copy
//!
#![no_main] #![no_main]
#![no_std] #![no_std]
......
examples/bare6.rs
+ 1
− 4
View file @ ca3b6546
...@@ -6,8 +6,6 @@ ...@@ -6,8 +6,6 @@
//! - using svd2rust generated API //! - using svd2rust generated API
//! - setting the clock via script (again) //! - setting the clock via script (again)
//! - routing the clock to a PIN for monitoring by an oscilloscope //! - routing the clock to a PIN for monitoring by an oscilloscope
//! - changing the clock using Rust code
//!
#![no_main] #![no_main]
#![no_std] #![no_std]
...@@ -25,7 +23,7 @@ fn main() -> ! { ...@@ -25,7 +23,7 @@ fn main() -> ! {
let mut c = stm32f413::CorePeripherals::take().unwrap(); let mut c = stm32f413::CorePeripherals::take().unwrap();
let stim = &mut c.ITM.stim[0]; let stim = &mut c.ITM.stim[0];
iprintln!(stim, "Hello, bare6!"); iprintln!(stim, "bare6!");
c.DWT.enable_cycle_counter(); c.DWT.enable_cycle_counter();
unsafe { unsafe {
...@@ -35,7 +33,6 @@ fn main() -> ! { ...@@ -35,7 +33,6 @@ fn main() -> ! {
iprintln!(stim, "{}", t); iprintln!(stim, "{}", t);
clock_out(&p.RCC, &p.GPIOC); clock_out(&p.RCC, &p.GPIOC);
// clock::set_84_mhz(rcc, flash);
idle(stim, p.RCC, p.GPIOA); idle(stim, p.RCC, p.GPIOA);
loop {} loop {}
......
examples/bare7.rs
+ 5
− 7
View file @ ca3b6546
//! Serial echo //! Serial echo
//! //!
//! Connect using e.g., `moserial` to `/dev/ttyACM0` //! What it covers:
//! 115200 8N1 //! - changing the clock using Rust code
//! //! - working with the svd2rust API
//! The MCU will echo incoming data and send a trace over ITM.
//! Notice, as the hardware has a single byte buffer only, the input
//! buffer may overflow.
#![deny(unsafe_code)] #![deny(unsafe_code)]
#![feature(uniform_paths)] #![feature(uniform_paths)]
...@@ -146,6 +143,7 @@ fn main() -> ! { ...@@ -146,6 +143,7 @@ fn main() -> ! {
// commit your answers (bare7_3) // commit your answers (bare7_3)
// //
// 4. Revisit the `README.md` regarding serial communication. // 4. Revisit the `README.md` regarding serial communication.
// Setup `minicom` or similar to `/dev/ttyACM0`, 115200 8N1.
// //
// Run the example, make sure your ITM is set to 84MHz. // Run the example, make sure your ITM is set to 84MHz.
// //
...@@ -182,7 +180,7 @@ fn main() -> ! { ...@@ -182,7 +180,7 @@ fn main() -> ! {
// //
// Your crate can be autmatically documentedthread: // Your crate can be autmatically documentedthread:
// //
// $ cargo doc --open --features stm32f4 // $ cargo doc --open --features "hal"
// //
// This will document both your crate and its dependencies besides the `core` library. // This will document both your crate and its dependencies besides the `core` library.
// //
......
examples/bare8.rs
+ 18
− 212
View file @ ca3b6546
// #![deny(unsafe_code)] //! The RTFM framework
// #![deny(warnings)] //!
//! What it covers:
//! - utilisizing the RTFM framework for serial communicaton
//! - singletons (enteties with a singe instance)
//! - owned resources
//! - peripheral access in RTFM
#![no_main] #![no_main]
#![no_std] #![no_std]
...@@ -13,13 +19,9 @@ use crate::hal::prelude::*; ...@@ -13,13 +19,9 @@ use crate::hal::prelude::*;
use crate::hal::serial::{config::Config, Rx, Serial, Tx}; use crate::hal::serial::{config::Config, Rx, Serial, Tx};
use hal::stm32::{ITM, USART2}; use hal::stm32::{ITM, USART2};
// use crate::hal::stm32::Interrupt::EXTI0;
use rtfm::app; use rtfm::app;
// use hal::stm32::Interrupt::EXTI0;
#[app(device = hal::stm32)] #[app(device = hal::stm32)]
// #[app(device = stm32f4xx_hal::stm32)]
const APP: () = { const APP: () = {
// Late resources // Late resources
static mut TX: Tx<USART2> = (); static mut TX: Tx<USART2> = ();
...@@ -30,7 +32,7 @@ const APP: () = { ...@@ -30,7 +32,7 @@ const APP: () = {
#[init] #[init]
fn init() { fn init() {
let stim = &mut core.ITM.stim[0]; let stim = &mut core.ITM.stim[0];
iprintln!(stim, "start"); iprintln!(stim, "bare8");
let rcc = device.RCC.constrain(); let rcc = device.RCC.constrain();
...@@ -80,208 +82,12 @@ const APP: () = { ...@@ -80,208 +82,12 @@ const APP: () = {
} }
}; };
// extern crate cortex_m_rtfm as rtfm; // 1. Compile and run the example.
// extern crate f4; // Verify that it has the same behavior as bare7.
// extern crate heapless; //
// 2. Add a local variable `received` that counts the number of bytes received.
// #[macro_use] // Add a local variable `errors` that counts the number of errors.
// extern crate cortex_m_debug; //
// Adjust the ITM trace to include the additional information.
// use f4::prelude::*; //
// use f4::Serial; // commit your development (bare8_2)
// use f4::time::Hertz;
// use heapless::Vec;
// use rtfm::{app, Resource, Threshold};
// // CONFIGURATION
// const BAUD_RATE: Hertz = Hertz(115_200);
// // RTFM FRAMEWORK
// app! {
// device: f4::stm32f40x,
// resources: {
// static VECTOR: Vec<u8, [u8; 4]> = Vec::new();
// },
// tasks: {
// USART2: {
// path: rx,
// priority: 2,
// resources: [VECTOR, USART2],
// },
// EXTI1: {
// path: trace,
// priority: 1,
// resources: [VECTOR],
// }
// },
// }
// // `rx` task trigger on arrival of a USART2 interrupt
// fn rx(t: &mut Threshold, r: USART2::Resources) {
// let serial = Serial(&**r.USART2);
// // we don't need to block waiting for data to arrive
// // (as we were triggered) by the data arrival (or error)
// match serial.read() {
// Ok(byte) => {
// // received byte correct
// r.VECTOR.claim_mut(t, |vector, _| {
// // critical section for the shared vector
// let _ = vector.push(byte);
// // here you could put your error handling for vector full
// });
// let _ = serial.write(byte);
// }
// Err(err) => {
// // some transmission error
// ipln!("Error {:?}", err);
// r.USART2.dr.read(); // clear the error by reading the data register
// }
// }
// // trigger the `trace` task
// rtfm::set_pending(f4::stm32f40x::Interrupt::EXTI1);
// }
// // `trace` task triggered by the hight priority `rx` task
// // a low priority task for the background processing (like tracing)
// fn trace(t: &mut Threshold, r: EXTI1::Resources) {
// let mut b = [0; 4]; // local buffer
// let mut l = 0; // length of the received vector
// r.VECTOR.claim(t, |vector, _| {
// // critical section for the shared vector
// // here the task `rx` will be blocked from executing
// l = vector.len();
// b[..l].copy_from_slice(&***vector); // efficent copy vector to the local buffer
// });
// // since we do the actual tracing (relatively slow)
// // OUTSIDE the claim (critical section), there will be no
// // additional blocking of `rx`
// ipln!("Vec {:?}", &b[..l]);
// }
// // Here we see the typical use of init INITIALIZING the system
// fn init(p: init::Peripherals, _r: init::Resources) {
// ipln!("init");
// let serial = Serial(p.USART2);
// serial.init(BAUD_RATE.invert(), None, p.GPIOA, p.RCC);
// // in effect telling the USART2 to trigger the `rx` task/interrupt
// serial.listen(f4::serial::Event::Rxne);
// }
// // We will spend all time sleeping (unless we have work to do)
// // reactive programming in RTFM ftw!!!
// fn idle() -> ! {
// // Sleep
// loop {
// rtfm::wfi();
// }
// }
// // 1. compile and run the project at 16MHz
// // make sure its running (not paused)
// // start a terminal program, e.g., `moserial`
// // connect to the port
// //
// // Device /dev/ttyACM0
// // Baude Rate 115200
// // Data Bits 8
// // Stop Bits 1
// // Parity None
// // Handshake None
// //
// // (this is also known in short as 15200 8N1)
// //
// // you should now be able to send data and recive an echo from the MCU
// //
// // try sending: "abcd" as a single sequence (set the option No end in moserial)
// // (don't send the quation marks, just abcd)
// //
// // what did you receive, and what was the output of the ITM trace
// // ** your answer here **
// //
// // did you experience any over-run errors?
// // ** your answer here **
// //
// // what is the key problem and its solution (try to follow the commented code)
// // ** your answer here **
// //
// // commit your answers (bare8_1)
// //
// // 2. now catch the case when we are trying to write to a full vector/buffer
// // and write a suiteble error message
// //
// // commit your answers (bare8_2)
// //
// // as a side note....
// //
// // The concurrency model behind RTFM offers
// // 1. Race-free resource access
// //
// // 2. Deadlock-free exection
// //
// // 3. Shared execution stack (no pre-allocated stack regions)
// //
// // 4. Bound priority inversion
// //
// // 5. Theoretical underpinning ->
// // + proofs of soundness
// // + schedulability analysis
// // + response time analysis
// // + stack memory analysis
// // + ... leverages on 25 years of reseach in the real-time community
// // based on the seminal work of Baker in the early 1990s
// // (known as the Stack Resource Policy, SRP)
// //
// // Our implementation in Rust offers
// // 1. compile check and analysis of tasks and resources
// // + the API implementation together with the Rust compiler will ensure that
// // both RTFM (SRP) soundness and the Rust memory model invariants
// // are upheld (under all circumpstances).
// //
// // 2. arguably the worlds fastest real time scheduler *
// // + task invocation 0-cycle OH on top of HW interrupt handling
// // + 2 cycle OH for locking a shared resource (on claim entry)
// // + 1 cycle OH for releasineg a shared resoure (on claim exit)
// //
// // 3. arguably the worlds most memory efficient scheduler *
// // + 1 byte stack memory OH for each (nested) claim
// // (no additional book-keeping during run-time)
// //
// // * applies to static task/resource models with single core
// // pre-emptive, static priority scheduling
// //
// // in comparison "real-time" schedulers for threaded models like FreeRTOS
// // - CPU and memory OH magnitudes larger (100s of cycles/kilobytes of memory)
// // - ... and what's worse OH is typically unbound (no proofs of worst case)
// // - potential race conditions (up to the user to verify)
// // - potential dead-locks (up to the implementation)
// // - potential unbound priority inversion (up to the implementation)
// //
// // Rust RTFM (currently) target ONLY STATIC SYSTEMS, there is no notion
// // of dynamically creating new executions contexts/threads
// // so a direct comparison is not completely fair.
// //
// // On the other hand, embedded applications are typically static by nature
// // so a STATIC model is to that end better suitable.
// //
// // RTFM is reactive by nature, a task execute to end, triggered
// // by an internal or external event, (where an interrupt is an external event
// // from the environment, like a HW peripheral such as the USART2).
// //
// // Threads on the other hand are concurrent and infinte by nature and
// // actively blocking/yeilding awaiting stimuli. Hence reactivity needs to be CODED.
// // This leads to an anomaly, the underlying HW is reactive (interrupts),
// // requiring an interrupt handler, that creates a signal to the scheduler.
// //
// // The scheduler then needs to keep track of all threads and at some point choose
// // to dispatch the awaiting thread. So reactivity is bottlenecked to the point
// // of scheduling by que management, context switching and other additional
// // book keeping.
// //
// // In essence, the thread scheduler tries to re-establish the reactivity that
// // were there (interrupts), a battle that cannot be won...
examples/bare9.rs
+ 0
− 3
View file @ ca3b6546
...@@ -13,11 +13,8 @@ use crate::hal::prelude::*; ...@@ -13,11 +13,8 @@ use crate::hal::prelude::*;
use crate::hal::serial::{config::Config, Event, Rx, Serial, Tx}; use crate::hal::serial::{config::Config, Event, Rx, Serial, Tx};
use hal::stm32::ITM; use hal::stm32::ITM;
// use crate::hal::stm32::Interrupt::EXTI0;
use rtfm::app; use rtfm::app;
// use hal::stm32::Interrupt::EXTI0;
// #[app(device = stm32f4xx_hal::stm32)]
#[app(device = hal::stm32)] #[app(device = hal::stm32)]
const APP: () = { const APP: () = {
......
examples/device.rs
+ 1
− 1
View file @ ca3b6546
...@@ -23,7 +23,7 @@ extern crate panic_halt; ...@@ -23,7 +23,7 @@ extern crate panic_halt;
use cortex_m::{iprint, peripheral::syst::SystClkSource}; use cortex_m::{iprint, peripheral::syst::SystClkSource};
use cortex_m_rt::entry; use cortex_m_rt::entry;
use cortex_m_semihosting::hprintln; use cortex_m_semihosting::hprintln;
use stm32f4::stm32f411::{interrupt, Interrupt, ITM, NVIC}; use stm32f4::stm32f413::{interrupt, Interrupt, ITM, NVIC};
#[entry] #[entry]
fn main() -> ! { fn main() -> ! {
......
examples/serial.rs
+ 1
− 3
View file @ ca3b6546
...@@ -40,9 +40,7 @@ fn main() -> ! { ...@@ -40,9 +40,7 @@ fn main() -> ! {
// let _clocks = rcc.cfgr.freeze(); // let _clocks = rcc.cfgr.freeze();
let tx = gpioa.pa2.into_alternate_af7(); let tx = gpioa.pa2.into_alternate_af7();
let rx = gpioa.pa3.into_alternate_af7(); // try comment out let rx = gpioa.pa3.into_alternate_af7(); // try comment out
// let rx = gpioa.pa3.into_alternate_af0(); // try uncomment // let rx = gpioa.pa3.into_alternate_af0(); // try uncomment
let serial = Serial::usart2( let serial = Serial::usart2(
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment