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Per Lindgren
app
Commits
23ddecd9
Commit
23ddecd9
authored
6 years ago
by
Per Lindgren
Browse files
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bare9
parent
ca3b6546
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Changes
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3 changed files
.vscode/launch.json
+27
-0
27 additions, 0 deletions
.vscode/launch.json
.vscode/tasks.json
+12
-0
12 additions, 0 deletions
.vscode/tasks.json
examples/bare9.rs
+36
-17
36 additions, 17 deletions
examples/bare9.rs
with
75 additions
and
17 deletions
.vscode/launch.json
+
27
−
0
View file @
23ddecd9
...
@@ -582,5 +582,32 @@
...
@@ -582,5 +582,32 @@
"svdFile"
:
"STM32F413.svd"
,
"svdFile"
:
"STM32F413.svd"
,
"cwd"
:
"${workspaceRoot}"
"cwd"
:
"${workspaceRoot}"
},
},
{
"type"
:
"cortex-debug"
,
"request"
:
"launch"
,
"servertype"
:
"openocd"
,
"name"
:
"bare9 (reselase)"
,
"preLaunchTask"
:
"cargo build --example bare9 --release"
,
"executable"
:
"./target/thumbv7em-none-eabihf/release/examples/bare9"
,
"configFiles"
:
[
"interface/stlink.cfg"
,
"target/stm32f4x.cfg"
],
"swoConfig"
:
{
"enabled"
:
true
,
"cpuFrequency"
:
16000000
,
"swoFrequency"
:
2000000
,
"source"
:
"probe"
,
"decoders"
:
[
{
"type"
:
"console"
,
"label"
:
"ITM"
,
"port"
:
0
}
]
},
"svdFile"
:
"STM32F413.svd"
,
"cwd"
:
"${workspaceRoot}"
},
]
]
}
}
\ No newline at end of file
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.vscode/tasks.json
+
12
−
0
View file @
23ddecd9
...
@@ -255,5 +255,17 @@
...
@@ -255,5 +255,17 @@
"isDefault"
:
true
"isDefault"
:
true
}
}
},
},
{
"type"
:
"shell"
,
"label"
:
"cargo build --example bare9 --release"
,
"command"
:
"cargo build --example bare9 --release --features
\"
hal rtfm
\"
"
,
"problemMatcher"
:
[
"$rustc"
],
"group"
:
{
"kind"
:
"build"
,
"isDefault"
:
true
}
},
]
]
}
}
\ No newline at end of file
This diff is collapsed.
Click to expand it.
examples/bare9.rs
+
36
−
17
View file @
23ddecd9
...
@@ -6,13 +6,15 @@
...
@@ -6,13 +6,15 @@
extern
crate
panic_halt
;
extern
crate
panic_halt
;
use
cortex_m
::{
asm
,
iprintln
};
use
cortex_m
::{
asm
,
iprintln
};
use
nb
::
block
;
extern
crate
stm32f4xx_hal
as
hal
;
extern
crate
stm32f4xx_hal
as
hal
;
use
crate
::
hal
::
prelude
::
*
;
use
crate
::
hal
::
prelude
::
*
;
use
crate
::
hal
::
serial
::{
config
::
Config
,
Event
,
Rx
,
Serial
,
Tx
};
use
crate
::
hal
::
serial
::{
config
::
Config
,
Event
,
Rx
,
Serial
,
Tx
};
use
hal
::
stm32
::
ITM
;
use
hal
::
stm32
::
ITM
;
use
heapless
::
consts
::
*
;
use
heapless
::
spsc
::{
Consumer
,
Producer
,
Queue
};
use
rtfm
::
app
;
use
rtfm
::
app
;
#[app(device
=
hal::stm32)]
#[app(device
=
hal::stm32)]
...
@@ -21,11 +23,20 @@ const APP: () = {
...
@@ -21,11 +23,20 @@ const APP: () = {
// Late resources
// Late resources
static
mut
TX
:
Tx
<
hal
::
stm32
::
USART2
>
=
();
static
mut
TX
:
Tx
<
hal
::
stm32
::
USART2
>
=
();
static
mut
RX
:
Rx
<
hal
::
stm32
::
USART2
>
=
();
static
mut
RX
:
Rx
<
hal
::
stm32
::
USART2
>
=
();
static
mut
PRODUCER
:
Producer
<
'static
,
u8
,
U3
>
=
();
static
mut
CONSUMER
:
Consumer
<
'static
,
u8
,
U3
>
=
();
static
mut
ITM
:
ITM
=
();
static
mut
ITM
:
ITM
=
();
// init runs in an interrupt free section
// init runs in an interrupt free section
#[init]
#[init]
fn
init
()
{
fn
init
()
{
// A ring buffer for our data
static
mut
RB
:
Option
<
Queue
<
u8
,
U3
>>
=
None
;
*
RB
=
Some
(
Queue
::
new
());
// Split into producer/consumer pair
let
(
producer
,
consumer
)
=
RB
.as_mut
()
.unwrap
()
.split
();
let
stim
=
&
mut
core
.ITM.stim
[
0
];
let
stim
=
&
mut
core
.ITM.stim
[
0
];
iprintln!
(
stim
,
"start"
);
iprintln!
(
stim
,
"start"
);
...
@@ -53,42 +64,50 @@ const APP: () = {
...
@@ -53,42 +64,50 @@ const APP: () = {
let
(
tx
,
rx
)
=
serial
.split
();
let
(
tx
,
rx
)
=
serial
.split
();
// Late resources
// Late resources
// Our split queue
PRODUCER
=
producer
;
CONSUMER
=
consumer
;
// Our split serial
TX
=
tx
;
TX
=
tx
;
RX
=
rx
;
RX
=
rx
;
// For debugging
ITM
=
core
.ITM
;
ITM
=
core
.ITM
;
}
}
// idle may be interrupted by other interrupt/tasks in the system
// idle may be interrupted by other interrupt/tasks in the system
// #[idle(resources = [RX, TX, ITM])]
// #[idle(resources = [RX, TX, ITM])]
#[idle(resources
=
[
ITM]
)]
#[idle(resources
=
[
ITM
,
CONSUMER
]
)]
fn
idle
()
->
!
{
fn
idle
()
->
!
{
let
stim
=
&
mut
resources
.ITM.stim
[
0
];
loop
{
loop
{
resources
.ITM
.lock
(|
itm
|
{
while
let
Some
(
byte
)
=
resources
.CONSUMER
.dequeue
()
{
let
stim
=
&
mut
itm
.stim
[
0
];
iprintln!
(
stim
,
"data {}"
,
byte
);
}
iprintln!
(
stim
,
"goto sleep"
);
iprintln!
(
stim
,
"goto sleep"
);
});
asm
::
wfi
();
asm
::
wfi
();
resources
.ITM
.lock
(|
itm
|
{
let
stim
=
&
mut
itm
.stim
[
0
];
iprintln!
(
stim
,
"woken.."
);
iprintln!
(
stim
,
"woken.."
);
});
}
}
}
}
#[interrupt(resources
=
[
RX,
TX,
ITM
]
)]
#[interrupt(resources
=
[
RX,
TX,
PRODUCER
]
)]
fn
USART2
()
{
fn
USART2
()
{
let
rx
=
resources
.RX
;
let
rx
=
resources
.RX
;
let
tx
=
resources
.TX
;
let
tx
=
resources
.TX
;
let
stim
=
&
mut
resources
.ITM.stim
[
0
];
match
block!
(
rx
.read
()
)
{
match
rx
.read
()
{
Ok
(
byte
)
=>
{
Ok
(
byte
)
=>
{
iprintln!
(
stim
,
"Ok {:?}"
,
byte
);
let
_
=
tx
.write
(
byte
);
let
_
=
tx
.write
(
byte
);
match
resources
.PRODUCER
.enqueue
(
byte
)
{
Ok
(
_
)
=>
{}
Err
(
_
)
=>
asm
::
bkpt
(),
}
}
Err
(
err
)
=>
{
iprintln!
(
stim
,
"Error {:?}"
,
err
);
}
}
Err
(
_err
)
=>
asm
::
bkpt
(),
}
}
}
}
};
};
...
...
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