Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
R
rtic_f4xx_nucleo
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Edvin Åkerfeldt
rtic_f4xx_nucleo
Commits
337b6067
Commit
337b6067
authored
4 years ago
by
Edvin Åkerfeldt
Browse files
Options
Downloads
Patches
Plain Diff
Updated the delays to make it fit in the schedueling
parent
9ef1a8df
No related branches found
No related tags found
No related merge requests found
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
examples/timing_exam.rs
+19
-17
19 additions, 17 deletions
examples/timing_exam.rs
with
19 additions
and
17 deletions
examples/timing_exam.rs
+
19
−
17
View file @
337b6067
...
@@ -41,18 +41,18 @@ const APP: () = {
...
@@ -41,18 +41,18 @@ const APP: () = {
#[task(schedule
=
[
t1]
,
priority
=
1
)]
#[task(schedule
=
[
t1]
,
priority
=
1
)]
fn
t1
(
cx
:
t1
::
Context
)
{
fn
t1
(
cx
:
t1
::
Context
)
{
//let start = Instant::now();
//let start = Instant::now();
asm
::
bkpt
();
asm
::
bkpt
();
//=> 100171 t1,t2 running: 100_199
cx
.schedule
.t1
(
cx
.scheduled
+
100_000
.cycles
())
.unwrap
();
cx
.schedule
.t1
(
cx
.scheduled
+
100_000
.cycles
())
.unwrap
();
asm
::
bkpt
();
asm
::
bkpt
();
//=> 100350
// emulates timing behavior of t1
// emulates timing behavior of t1
cortex_m
::
asm
::
delay
(
10_000
);
cortex_m
::
asm
::
delay
(
9_631
);
// 10_000 - 171 (context switch) - 179 (re-schedule) - 19 (rest of task code)
asm
::
bkpt
();
asm
::
bkpt
();
//=> 110353
// 2) your code here to update T1_MAX_RP and
// 2) your code here to update T1_MAX_RP and
// break if deadline missed
// break if deadline missed
let
resp
:
u32
=
cx
.scheduled
.elapsed
()
.as_cycles
();
let
resp
:
u32
=
cx
.scheduled
.elapsed
()
.as_cycles
();
asm
::
bkpt
();
asm
::
bkpt
();
//=> 110362
if
resp
>
100_000
{
if
resp
>
100_000
{
//panic!();
//panic!();
asm
::
bkpt
();
asm
::
bkpt
();
...
@@ -62,7 +62,7 @@ const APP: () = {
...
@@ -62,7 +62,7 @@ const APP: () = {
T1_MAX_RP
=
resp
;
T1_MAX_RP
=
resp
;
}
}
}
}
asm
::
bkpt
();
asm
::
bkpt
();
//=> 110369
}
}
// Deadline 200, Inter-arrival 200
// Deadline 200, Inter-arrival 200
...
@@ -71,22 +71,24 @@ const APP: () = {
...
@@ -71,22 +71,24 @@ const APP: () = {
fn
t2
(
mut
cx
:
t2
::
Context
)
{
fn
t2
(
mut
cx
:
t2
::
Context
)
{
//let start = Instant::now();
//let start = Instant::now();
asm
::
bkpt
();
asm
::
bkpt
();
//=> 200_183 t1,t2 rinning: 200_219
cx
.schedule
.t2
(
cx
.scheduled
+
200_000
.cycles
())
.unwrap
();
cx
.schedule
.t2
(
cx
.scheduled
+
200_000
.cycles
())
.unwrap
();
asm
::
bkpt
();
asm
::
bkpt
();
//=> 200_368
// 1) your code here to emulate timing behavior of t2
// 1) your code here to emulate timing behavior of t2
// == Begin trace ==
// == Begin trace ==
asm
::
delay
(
10_000
);
asm
::
delay
(
9_550
);
// 10_000 - 183 (context switch) - 75 (preemtion time, calc from t3) - 185 (re-schedual) - 7 (other)
// R1 : claim
// R1 : claim
asm
::
delay
(
2_000
);
asm
::
delay
(
2_000
);
// R2 : claim
// R2 : claim
asm
::
bkpt
();
//=> 212_375
cx
.resources.R2
.lock
(|
r2
|
{
cx
.resources.R2
.lock
(|
r2
|
{
*
r2
=
1338
;
*
r2
=
1338
;
asm
::
delay
(
4_000
);
asm
::
delay
(
3_972
);
//=> 4_000 critical section - 29 (lock semantics + )
*
r2
=
1668
;
*
r2
=
1668
;
});
});
asm
::
bkpt
();
//=> 216_406
// R2 : release
// R2 : release
asm
::
delay
(
4_000
);
asm
::
delay
(
4_000
);
// R1 : release
// R1 : release
...
@@ -94,7 +96,7 @@ const APP: () = {
...
@@ -94,7 +96,7 @@ const APP: () = {
// R1 : claim
// R1 : claim
asm
::
delay
(
6_000
);
asm
::
delay
(
6_000
);
// R1 : release
// R1 : release
asm
::
delay
(
2_000
);
asm
::
delay
(
1_968
);
//=> last 2_000 - 32 (rest of the task code)
// == End trace ==
// == End trace ==
asm
::
bkpt
();
asm
::
bkpt
();
...
@@ -110,7 +112,7 @@ const APP: () = {
...
@@ -110,7 +112,7 @@ const APP: () = {
T2_MAX_RP
=
resp
;
T2_MAX_RP
=
resp
;
}
}
}
}
asm
::
bkpt
();
asm
::
bkpt
();
//=> 230_438 ----> 230_001
}
}
// Deadline 50, Inter-arrival 50
// Deadline 50, Inter-arrival 50
...
@@ -118,9 +120,9 @@ const APP: () = {
...
@@ -118,9 +120,9 @@ const APP: () = {
#[task(schedule
=
[
t3]
,
resources
=
[
R2
],
priority
=
3
)]
#[task(schedule
=
[
t3]
,
resources
=
[
R2
],
priority
=
3
)]
fn
t3
(
cx
:
t3
::
Context
)
{
fn
t3
(
cx
:
t3
::
Context
)
{
//let start = Instant::now();
//let start = Instant::now();
asm
::
bkpt
();
asm
::
bkpt
();
// 50_174 all running: 50249
cx
.schedule
.t3
(
cx
.scheduled
+
50_000
.cycles
())
.unwrap
();
cx
.schedule
.t3
(
cx
.scheduled
+
50_000
.cycles
())
.unwrap
();
asm
::
bkpt
();
asm
::
bkpt
();
// 50_272
// 1) your code here to emulate timing behavior of t3
// 1) your code here to emulate timing behavior of t3
...
@@ -130,10 +132,10 @@ const APP: () = {
...
@@ -130,10 +132,10 @@ const APP: () = {
*
cx
.resources.R2
=
1337
;
*
cx
.resources.R2
=
1337
;
asm
::
delay
(
10_000
);
asm
::
delay
(
10_000
);
// R2 : release
// R2 : release
asm
::
delay
(
10_000
);
asm
::
delay
(
9_617
);
// 10_000 - 98 (re-scheduling) - 174 (context switching, one task) - 75 (preemption check, all tasks) - 36 (rest of the task code)
// == End trace ==
// == End trace ==
asm
::
bkpt
();
asm
::
bkpt
();
// => 80290
// 2) your code here to update T3_MAX_RP and
// 2) your code here to update T3_MAX_RP and
// break if deadline missed
// break if deadline missed
let
resp
:
u32
=
cx
.scheduled
.elapsed
()
.as_cycles
();
let
resp
:
u32
=
cx
.scheduled
.elapsed
()
.as_cycles
();
...
@@ -146,7 +148,7 @@ const APP: () = {
...
@@ -146,7 +148,7 @@ const APP: () = {
T3_MAX_RP
=
resp
;
T3_MAX_RP
=
resp
;
}
}
}
}
asm
::
bkpt
();
asm
::
bkpt
();
// => 80_308 ----> 79_999
}
}
// RTIC requires that unused interrupts are declared in an extern block when
// RTIC requires that unused interrupts are declared in an extern block when
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment