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e7020e_2021
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Deux Babiri Futari
e7020e_2021
Commits
eb54a0ff
Commit
eb54a0ff
authored
4 years ago
by
Per Lindgren
Browse files
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sine now is 64k/0.72Hz
parent
df9f7420
Branches
Branches containing commit
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No related merge requests found
Changes
3
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3 changed files
build.rs
+1
-1
1 addition, 1 deletion
build.rs
examples/rtt-pwm-sine-task.rs
+10
-10
10 additions, 10 deletions
examples/rtt-pwm-sine-task.rs
examples/rtt-pwm-sine-timer-task.rs
+2
-2
2 additions, 2 deletions
examples/rtt-pwm-sine-timer-task.rs
with
13 additions
and
13 deletions
build.rs
+
1
−
1
View file @
eb54a0ff
...
@@ -38,7 +38,7 @@ fn main() -> Result<()> {
...
@@ -38,7 +38,7 @@ fn main() -> Result<()> {
let
dest_path
=
Path
::
new
(
&
out_dir
)
.join
(
"sin_abs_const.rs"
);
let
dest_path
=
Path
::
new
(
&
out_dir
)
.join
(
"sin_abs_const.rs"
);
let
mut
f
=
File
::
create
(
&
dest_path
)
.unwrap
();
let
mut
f
=
File
::
create
(
&
dest_path
)
.unwrap
();
const
SINE_BUF_SIZE
:
usize
=
25
6
;
const
SINE_BUF_SIZE
:
usize
=
6553
6
;
write!
(
f
,
"const SINE_BUF_SIZE: usize = {};
\n
"
,
SINE_BUF_SIZE
)
?
;
write!
(
f
,
"const SINE_BUF_SIZE: usize = {};
\n
"
,
SINE_BUF_SIZE
)
?
;
write!
(
f
,
"const SINE_BUF: [u8; SINE_BUF_SIZE] = ["
)
?
;
write!
(
f
,
"const SINE_BUF: [u8; SINE_BUF_SIZE] = ["
)
?
;
...
...
This diff is collapsed.
Click to expand it.
examples/rtt-pwm-sine-task.rs
+
10
−
10
View file @
eb54a0ff
...
@@ -23,7 +23,7 @@ const APP: () = {
...
@@ -23,7 +23,7 @@ const APP: () = {
// late resources
// late resources
TIM1
:
stm32
::
TIM1
,
TIM1
:
stm32
::
TIM1
,
}
}
#[init(schedule
=
[
pwmout]
)]
#[init(schedule
=
[
pwm
_
out]
)]
fn
init
(
mut
cx
:
init
::
Context
)
->
init
::
LateResources
{
fn
init
(
mut
cx
:
init
::
Context
)
->
init
::
LateResources
{
rtt_init_print!
();
rtt_init_print!
();
rprintln!
(
"init"
);
rprintln!
(
"init"
);
...
@@ -46,7 +46,7 @@ const APP: () = {
...
@@ -46,7 +46,7 @@ const APP: () = {
let
gpioa
=
dp
.GPIOA
.split
();
let
gpioa
=
dp
.GPIOA
.split
();
// we set the pins to VeryHigh to get the sharpest waveform possible
// we set the pins to VeryHigh to get the sharpest waveform possible
// (rise and fall times should have similar characteristics)
// (rise and fall times should have similar characteristics)
let
channels
=
(
let
_
channels
=
(
gpioa
.pa8
.into_alternate_af1
()
.set_speed
(
Speed
::
VeryHigh
),
gpioa
.pa8
.into_alternate_af1
()
.set_speed
(
Speed
::
VeryHigh
),
gpioa
.pa9
.into_alternate_af1
()
.set_speed
(
Speed
::
VeryHigh
),
gpioa
.pa9
.into_alternate_af1
()
.set_speed
(
Speed
::
VeryHigh
),
);
);
...
@@ -69,7 +69,7 @@ const APP: () = {
...
@@ -69,7 +69,7 @@ const APP: () = {
.modify
(|
_
,
w
|
w
.oc2pe
()
.set_bit
()
.oc2m
()
.pwm_mode1
());
.modify
(|
_
,
w
|
w
.oc2pe
()
.set_bit
()
.oc2m
()
.pwm_mode1
());
// The reference manual is a bit ambiguous about when enabling this bit is really
// The reference manual is a bit ambiguous about when enabling this bit is really
// necessary, but since we MUST enable the preload for the output channels then we
// necessary, but since we MUST enable the pre
-
load for the output channels then we
// might as well enable for the auto-reload too
// might as well enable for the auto-reload too
tim1
.cr1
.modify
(|
_
,
w
|
w
.arpe
()
.set_bit
());
tim1
.cr1
.modify
(|
_
,
w
|
w
.arpe
()
.set_bit
());
...
@@ -103,7 +103,7 @@ const APP: () = {
...
@@ -103,7 +103,7 @@ const APP: () = {
tim1
.cr1
.write
(|
w
|
{
tim1
.cr1
.write
(|
w
|
{
w
.cms
()
w
.cms
()
.bits
(
0b00
)
// edge aligned mode
.bits
(
0b00
)
// edge aligned mode
.dir
()
// counter used as upcounter
.dir
()
// counter used as up
-
counter
.clear_bit
()
.clear_bit
()
.opm
()
// one pulse mode
.opm
()
// one pulse mode
.clear_bit
()
.clear_bit
()
...
@@ -135,7 +135,7 @@ const APP: () = {
...
@@ -135,7 +135,7 @@ const APP: () = {
tim1
.sr
.modify
(|
_
,
w
|
w
.uif
()
.clear
());
tim1
.sr
.modify
(|
_
,
w
|
w
.uif
()
.clear
());
// pass on late resources
// pass on late resources
cx
.schedule
.pwmout
(
cx
.start
+
PERIOD
.cycles
())
.ok
();
cx
.schedule
.pwm
_
out
(
cx
.start
+
PERIOD
.cycles
())
.ok
();
init
::
LateResources
{
TIM1
:
tim1
}
init
::
LateResources
{
TIM1
:
tim1
}
}
}
...
@@ -148,9 +148,9 @@ const APP: () = {
...
@@ -148,9 +148,9 @@ const APP: () = {
}
}
}
}
#[task(resources
=
[
TIM1]
,
schedule
=
[
pwmout
])]
#[task(resources
=
[
TIM1]
,
schedule
=
[
pwm
_
out
])]
fn
pwmout
(
cx
:
pwmout
::
Context
)
{
fn
pwm
_
out
(
cx
:
pwm
_
out
::
Context
)
{
static
mut
INDEX
:
u
8
=
0
;
static
mut
INDEX
:
u
16
=
0
;
static
mut
LEFT
:
u16
=
0
;
static
mut
LEFT
:
u16
=
0
;
static
mut
RIGHT
:
u16
=
0
;
static
mut
RIGHT
:
u16
=
0
;
...
@@ -159,8 +159,8 @@ const APP: () = {
...
@@ -159,8 +159,8 @@ const APP: () = {
tim1
.ccr1
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
LEFT
)
});
tim1
.ccr1
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
LEFT
)
});
tim1
.ccr2
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
RIGHT
)
});
tim1
.ccr2
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
RIGHT
)
});
*
INDEX
=
(
*
INDEX
)
.wrapping_add
(
25
);
*
INDEX
=
(
*
INDEX
)
.wrapping_add
(
10_000
);
cx
.schedule
.pwmout
(
cx
.scheduled
+
PERIOD
.cycles
())
.ok
();
cx
.schedule
.pwm
_
out
(
cx
.scheduled
+
PERIOD
.cycles
())
.ok
();
*
LEFT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
*
LEFT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
*
RIGHT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
*
RIGHT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
...
...
This diff is collapsed.
Click to expand it.
examples/rtt-pwm-sine-timer-task.rs
+
2
−
2
View file @
eb54a0ff
...
@@ -159,7 +159,7 @@ const APP: () = {
...
@@ -159,7 +159,7 @@ const APP: () = {
#[task(binds
=
TIM2,
resources
=
[
TIM1,
timer2]
)]
#[task(binds
=
TIM2,
resources
=
[
TIM1,
timer2]
)]
fn
tim2
(
cx
:
tim2
::
Context
)
{
fn
tim2
(
cx
:
tim2
::
Context
)
{
static
mut
INDEX
:
u
8
=
0
;
static
mut
INDEX
:
u
16
=
0
;
static
mut
LEFT
:
u16
=
0
;
static
mut
LEFT
:
u16
=
0
;
static
mut
RIGHT
:
u16
=
0
;
static
mut
RIGHT
:
u16
=
0
;
cx
.resources.timer2
.clear_interrupt
(
Event
::
TimeOut
);
cx
.resources.timer2
.clear_interrupt
(
Event
::
TimeOut
);
...
@@ -169,7 +169,7 @@ const APP: () = {
...
@@ -169,7 +169,7 @@ const APP: () = {
tim1
.ccr1
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
LEFT
)
});
tim1
.ccr1
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
LEFT
)
});
tim1
.ccr2
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
RIGHT
)
});
tim1
.ccr2
.write
(|
w
|
unsafe
{
w
.ccr
()
.bits
(
*
RIGHT
)
});
*
INDEX
=
(
*
INDEX
)
.wrapping_add
(
25
);
*
INDEX
=
(
*
INDEX
)
.wrapping_add
(
10_000
);
*
LEFT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
*
LEFT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
*
RIGHT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
*
RIGHT
=
SINE_BUF
[
*
INDEX
as
usize
]
as
u16
;
...
...
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Click to expand it.
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