diff --git a/build.rs b/build.rs
index 1b9fd2cfc35a12ebc1460e4b7e2ee3218c3c7b84..2e3f804ba4a851e2f1bd23f9d7142971d9ab1fd5 100644
--- a/build.rs
+++ b/build.rs
@@ -38,7 +38,7 @@ fn main() -> Result<()> {
     let dest_path = Path::new(&out_dir).join("sin_abs_const.rs");
     let mut f = File::create(&dest_path).unwrap();
 
-    const SINE_BUF_SIZE: usize = 256;
+    const SINE_BUF_SIZE: usize = 65536;
     write!(f, "const SINE_BUF_SIZE: usize = {};\n", SINE_BUF_SIZE)?;
     write!(f, "const SINE_BUF: [u8; SINE_BUF_SIZE] = [")?;
 
diff --git a/examples/rtt-pwm-sine-task.rs b/examples/rtt-pwm-sine-task.rs
index e4d754c57dddc1f5122812850737582ebb330a97..485824181b3648945baed6e0c3dec05d0a1d635a 100644
--- a/examples/rtt-pwm-sine-task.rs
+++ b/examples/rtt-pwm-sine-task.rs
@@ -23,7 +23,7 @@ const APP: () = {
         // late resources
         TIM1: stm32::TIM1,
     }
-    #[init(schedule = [pwmout])]
+    #[init(schedule = [pwm_out])]
     fn init(mut cx: init::Context) -> init::LateResources {
         rtt_init_print!();
         rprintln!("init");
@@ -46,7 +46,7 @@ const APP: () = {
         let gpioa = dp.GPIOA.split();
         // we set the pins to VeryHigh to get the sharpest waveform possible
         // (rise and fall times should have similar characteristics)
-        let channels = (
+        let _channels = (
             gpioa.pa8.into_alternate_af1().set_speed(Speed::VeryHigh),
             gpioa.pa9.into_alternate_af1().set_speed(Speed::VeryHigh),
         );
@@ -69,7 +69,7 @@ const APP: () = {
             .modify(|_, w| w.oc2pe().set_bit().oc2m().pwm_mode1());
 
         // The reference manual is a bit ambiguous about when enabling this bit is really
-        // necessary, but since we MUST enable the preload for the output channels then we
+        // necessary, but since we MUST enable the pre-load for the output channels then we
         // might as well enable for the auto-reload too
         tim1.cr1.modify(|_, w| w.arpe().set_bit());
 
@@ -103,7 +103,7 @@ const APP: () = {
         tim1.cr1.write(|w| {
             w.cms()
                 .bits(0b00) // edge aligned mode
-                .dir() // counter used as upcounter
+                .dir() // counter used as up-counter
                 .clear_bit()
                 .opm() // one pulse mode
                 .clear_bit()
@@ -135,7 +135,7 @@ const APP: () = {
         tim1.sr.modify(|_, w| w.uif().clear());
 
         // pass on late resources
-        cx.schedule.pwmout(cx.start + PERIOD.cycles()).ok();
+        cx.schedule.pwm_out(cx.start + PERIOD.cycles()).ok();
         init::LateResources { TIM1: tim1 }
     }
 
@@ -148,9 +148,9 @@ const APP: () = {
         }
     }
 
-    #[task(resources = [TIM1], schedule = [pwmout])]
-    fn pwmout(cx: pwmout::Context) {
-        static mut INDEX: u8 = 0;
+    #[task(resources = [TIM1], schedule = [pwm_out])]
+    fn pwm_out(cx: pwm_out::Context) {
+        static mut INDEX: u16 = 0;
         static mut LEFT: u16 = 0;
         static mut RIGHT: u16 = 0;
 
@@ -159,8 +159,8 @@ const APP: () = {
         tim1.ccr1.write(|w| unsafe { w.ccr().bits(*LEFT) });
         tim1.ccr2.write(|w| unsafe { w.ccr().bits(*RIGHT) });
 
-        *INDEX = (*INDEX).wrapping_add(25);
-        cx.schedule.pwmout(cx.scheduled + PERIOD.cycles()).ok();
+        *INDEX = (*INDEX).wrapping_add(10_000);
+        cx.schedule.pwm_out(cx.scheduled + PERIOD.cycles()).ok();
 
         *LEFT = SINE_BUF[*INDEX as usize] as u16;
         *RIGHT = SINE_BUF[*INDEX as usize] as u16;
diff --git a/examples/rtt-pwm-sine-timer-task.rs b/examples/rtt-pwm-sine-timer-task.rs
index 23b604a84780caab2336ad140553f098aea536af..b861a880c7a073323278a97f957a037a4fb5b3cd 100644
--- a/examples/rtt-pwm-sine-timer-task.rs
+++ b/examples/rtt-pwm-sine-timer-task.rs
@@ -159,7 +159,7 @@ const APP: () = {
 
     #[task(binds = TIM2, resources = [TIM1, timer2])]
     fn tim2(cx: tim2::Context) {
-        static mut INDEX: u8 = 0;
+        static mut INDEX: u16 = 0;
         static mut LEFT: u16 = 0;
         static mut RIGHT: u16 = 0;
         cx.resources.timer2.clear_interrupt(Event::TimeOut);
@@ -169,7 +169,7 @@ const APP: () = {
         tim1.ccr1.write(|w| unsafe { w.ccr().bits(*LEFT) });
         tim1.ccr2.write(|w| unsafe { w.ccr().bits(*RIGHT) });
 
-        *INDEX = (*INDEX).wrapping_add(25);
+        *INDEX = (*INDEX).wrapping_add(10_000);
 
         *LEFT = SINE_BUF[*INDEX as usize] as u16;
         *RIGHT = SINE_BUF[*INDEX as usize] as u16;