Skip to content
Snippets Groups Projects
Select Git revision
  • 3d7d392eca680155a70f0db79ac4558c579210a9
  • student default protected
2 results

bare8.rs

Blame
  • Forked from Per Lindgren / e7020e_2019
    Source project has a limited visibility.
    bare8.rs 4.01 KiB
    //! bare8.rs
    //!
    //! The RTFM framework
    //!
    //! What it covers:
    //! - utilisizing the RTFM framework for serial communicaton
    //! - singletons (enteties with a singe instance)
    //! - owned resources
    //! - peripheral access in RTFM
    //! - polling in `idle`
    
    #![no_main]
    #![no_std]
    
    extern crate panic_halt;
    
    use cortex_m::{asm, iprintln};
    use nb::block;
    
    extern crate stm32f4xx_hal as hal;
    use crate::hal::prelude::*;
    use crate::hal::serial::{config::Config, Rx, Serial, Tx};
    use hal::stm32::{ITM, USART2};
    
    use rtfm::app;
    
    #[app(device = hal::stm32)]
    const APP: () = {
        // Late resources
        static mut TX: Tx<USART2> = ();
        static mut RX: Rx<USART2> = ();
        static mut ITM: ITM = ();
    
        // init runs in an interrupt free section
        #[init]
        fn init() {
            let stim = &mut core.ITM.stim[0];
            iprintln!(stim, "bare8");
    
            let rcc = device.RCC.constrain();
    
            // 16 MHz (default, all clocks)
            let clocks = rcc.cfgr.freeze();
    
            let gpioa = device.GPIOA.split();
    
            let tx = gpioa.pa2.into_alternate_af7();
            let rx = gpioa.pa3.into_alternate_af7(); 
    
            asm::bkpt();
    
            let serial = Serial::usart2(
                device.USART2,
                (tx, rx),
                Config::default().baudrate(115_200.bps()),
                clocks,
            )
            .unwrap();
    
            // Separate out the sender and receiver of the serial port
            let (tx, rx) = serial.split();
    
            // Late resources
            TX = tx;
            RX = rx;
            ITM = core.ITM;
        }
    
        // idle may be interrupted by other interrupt/tasks in the system
        #[idle(resources = [RX, TX, ITM])]