aes refactor

.gitignore

@@ -3,3 +3,4 @@
 .gdb_history
 Cargo.lock
 target/
+/Debug/

examples/nested.rs

@@ -53,7 +53,88 @@ fn wait(v: u32) {
     }
 }
 
+type Block = [u32; 4];
+type Key = Block;
+
+fn write_key(aes: &stm32f413::AES, key: &Key) {
+    aes.keyr0.write(|w| unsafe { w.bits(key[0]) });
+    aes.keyr1.write(|w| unsafe { w.bits(key[1]) });
+    aes.keyr2.write(|w| unsafe { w.bits(key[2]) });
+    aes.keyr3.write(|w| unsafe { w.bits(key[3]) });
+}
+
+//#[derive(Debug)]
+//struct Blocks<'a> {
+//    data_in: &'a [Block],
+//    data_out: &'a mut [Block],
+//}
+
+fn process(aes: &stm32f413::AES, b_in: &[Block], b_out: &mut [Block]) {
+    assert!(b_in.len() == b_out.len());
+    for i in 0..b_in.len() {
+        ipln!("block {}, i");
+        // write plain block
+        for d in b_in[i].iter() {
+            aes.dinr.write(|w| unsafe { w.bits(d.clone()) });
+        }
+        // wait until processing complete
+        let mut r = 0;
+        while aes.sr.read().ccf().bit_is_clear() {
+            r += 1;
+        }
+        ipln!("wait {}", r);
+        // read encoded data
+        for d in b_out[i].iter_mut() {
+            *d = aes.doutr.read().bits();
+        }
+    }
+}
+
+fn encrypt_ecb(aes: &stm32f413::AES, key: &Key, b_in: &[Block], b_out: &mut [Block]) {
+    // clear complete and disable AES;
+    aes.cr.write(|w| w.ccfc().set_bit());
+    write_key(aes, key);
+    // start encrytion, mode 1, ECB by default
+    aes.cr.modify(|_, w| w.en().set_bit());
+
+    process(aes, b_in, b_out);
+}
+
+fn decrypt_ecb(aes: &stm32f413::AES, key: &Key, b_in: &[Block], b_out: &mut [Block]) {
+    // clear complete and disable AES;
+    aes.cr.write(|w| w.ccfc().set_bit());
+    // mode 4. ECB
+    aes.cr.write(|w| unsafe { w.mode().bits(0b11) });
+    write_key(aes, key);
+    // start encrytion, mode 1, ECB by default
+    aes.cr.modify(|_, w| w.en().set_bit());
+
+    process(aes, b_in, b_out);
+}
+
 fn init(p: init::Peripherals, _r: init::Resources) {
+    ipln!("start");
+    // enable clocking of AES
+    p.RCC.ahb2enr.write(|w| w.crypen().set_bit());
+    // errata, device might not be ready
+    // rtfm::dsb(); // not implemented/exported
+    wait(1000);
+    let key = [0x0123_4567, 0x89ab_cdef, 0x0123_4567, 0x89ab_cdef];
+
+    p.AES.cr.modify(|_, w| w.en().set_bit());
+
+    //let mut b1 = [[0x0123_4567, 0x89ab_cdef, 0x0123_4567, 0x89ab_cdef]];
+    let mut b1 = [[0; 4]];
+    let mut b2 = [[0; 4]];
+
+    encrypt_ecb(&p.AES, &key, &b1, &mut b2);
+    ipln!("encrypted {:?}", b2);
+
+    decrypt_ecb(&p.AES, &key, &b2, &mut b1);
+    ipln!("decrypted {:?}", b1);
+}
+
+fn init_(p: init::Peripherals, _r: init::Resources) {
     rtfm::bkpt();
     ipln!("start");
     // enable clocking of AES

nucleo-64-rtfm.launch

@@ -19,7 +19,7 @@
 <stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="OpenOCD"/>
 <intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="3333"/>
 <stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target remote"/>
-<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="monitor tpiu config internal /tmp/itm.log uart off 64000000&#10;monitor itm port 0 on&#10;&#10;# Load the program executable&#10;# monitor reset init&#10;load&#10;monitor reset init&#10;#info breakpoints&#10;# Set a breakpoint at main().&#10;#tbreak main&#10;&#10;# Run to the breakpoint.&#10;# continue&#10;&#10;&#10;"/>
+<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="monitor tpiu config internal /tmp/itm.log uart off 64000000&#10;monitor itm port 0 on&#10;&#10;# Load the program executable&#10;# monitor reset init&#10;load&#10;monitor reset init&#10;#info breakpoints&#10;# Set a breakpoint at main().&#10;#tbreak main&#10;&#10;# Run to the breakpoint.&#10;continue&#10;&#10;&#10;"/>
 <stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value=""/>
 <booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="false"/>
 <booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="false"/>