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Per Lindgren
rust-mips3k
Commits
dd06f5c2
Commit
dd06f5c2
authored
5 years ago
by
Per
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WIP SyncSim (unsupported instruction)
parent
2f040671
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Pipeline
#166
failed
5 years ago
Stage: build
Stage: test
Changes
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README.md
+5
-1
5 additions, 1 deletion
README.md
link.ld
+1
-13
1 addition, 13 deletions
link.ld
mips_program.objdump
+57
-39
57 additions, 39 deletions
mips_program.objdump
with
63 additions
and
53 deletions
README.md
+
5
−
1
View file @
dd06f5c2
...
@@ -5,4 +5,8 @@ A minimal crate for experimenting with bare metal Rust for the MIPS-3k.
...
@@ -5,4 +5,8 @@ A minimal crate for experimenting with bare metal Rust for the MIPS-3k.
## Compilation
## Compilation
-
cargo install xargo
-
cargo install xargo
-
rustup
-
rustup
\ No newline at end of file
xargo build --release --example reverse
sde-objdump -h -z -s -d -t target/mipseb-unknown-none/release/examples/reverse > mips_program.objdump
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link.ld
+
1
−
13
View file @
dd06f5c2
...
@@ -16,17 +16,13 @@ SECTIONS
...
@@ -16,17 +16,13 @@ SECTIONS
*(.text*)
*(.text*)
}
}
.rodata :
{
*(.rodata*)
}
_gp = ALIGN(16);
_gp = ALIGN(16);
. = 0x00001000;
. = 0x00001000;
.data :
.data :
{
{
__sdata = .;
__sdata = .;
*(.rodata*);
*(.data*);
*(.data*);
__edata = .;
__edata = .;
}
}
...
@@ -43,14 +39,6 @@ SECTIONS
...
@@ -43,14 +39,6 @@ SECTIONS
}
}
_BSS_END = .;
_BSS_END = .;
.vectors ALIGN(0x1000) :
{
_VECTOR_START = .;
KEEP(*(.tlb_exception))
. = _VECTOR_START + 0x180;
KEEP(*(.exception))
}
_STACK_END = .;
_STACK_END = .;
_STACK_START = START_ADDR + MEMORY_SIZE;
_STACK_START = START_ADDR + MEMORY_SIZE;
}
}
\ No newline at end of file
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mips_program.objdump
+
57
−
39
View file @
dd06f5c2
target/mipseb-unknown-none/release/examples/reverse: file format elf32-tradbigmips
a.out: file format elf32-tradbigmips
Sections:
Sections:
Idx Name Size VMA LMA File off Algn
Idx Name Size VMA LMA File off Algn
0 .text 00000
03c
00000000 00000000 000000
6
0 2**2
0 .text 00000
140
00000000 00000000 000
1
0000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000040 00001000 00001000 00001060 2**4
1 .reginfo 00000018 00000158 00000158 00010158 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA, LINK_ONCE_SAME_SIZE
2 .data 0000000b 00001000 00001000 00011000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .got 00000008 00001010 00001010 00011010 2**4
CONTENTS, ALLOC, LOAD, DATA
CONTENTS, ALLOC, LOAD, DATA
2
.bss 00000000 000010
40
000010
40
000
010a0
2**0
4
.bss 00000000 000010
18
000010
18
000
11018
2**0
ALLOC
ALLOC
3 .reginfo 00000018 00000000 00000000 000010a0 2**2
5 .mdebug.abi32 00000000 00000000 00000000 00011018 2**0
CONTENTS, READONLY, LINK_ONCE_SAME_SIZE
CONTENTS, READONLY
4 .pdr 00000000 00000000 00000000 000010b8 2**2
6 .pdr 00000060 00000000 00000000 00011018 2**2
CONTENTS, READONLY
7 .comment 00000012 00000000 00000000 00011078 2**0
CONTENTS, READONLY
CONTENTS, READONLY
SYMBOL TABLE:
SYMBOL TABLE:
00000000 l d
.text
00000000
.text
00000000 l d
f *ABS*
00000000
reverse.7r779dn2-cgu.0
0000
1
00
0
l
d .data
000000
0
0
.data
000000
7c
l
F .text
000000
6
0
_ZN7reverse3rev17h10307c82767293bfE
0000
1
040 l
d
.bss
00000000 .
bss
00000
1
40 l
*ABS*
00000000 .
hidden _gp
0000
0000 l
d
.
reginfo
00000000
.reginfo
0000
1018 g
.
bss
00000000
__ebss
0000
0000 l
d
.
pdr
00000000
.pdr
0000
100b g
.
data
00000000
__edata
0000
0000 l
d
*ABS*
00000000
.shstrtab
0000
1018 g
.bss
00000000
__sbss
0000
0
000
l
d
*ABS*
00000000
.sym
ta
b
0000
1
000
g
.data
00000000
__sda
ta
0000
0
000
l
d
*ABS* 00000000
.str
ta
b
0000
1
000
g
*ABS* 00000000
__sida
ta
00000000
l
.text 000000
00 main
00000000
g
F
.text 000000
7c _start
0000
1
00
0 l
.
data
000000
00 intext
000000
dc g
F
.
text
000000
64 main
0000
101
0
l
.data
00000000
outtext
0000
000
0
g
*ABS*
00000000
START_ADDR
000000
14 l
.text
00000000
seek_end
80
000000
g
*ABS*
00000000
MEMORY_SIZE
000000
28 l
.
text
00000000
seek_end1
0000
1
00
b g
.
data
00000000
_BSS_START
0000
003
8
l
.
text
00000000
copy
0000
101
8
g
.
bss
00000000
_BSS_END
0000
003
8
l
.
text
00000000
stop
0000
101
8
g
.
bss
00000000
_STACK_END
0
0000000 g *ABS* 00000000 _
_start
8
0000000 g *ABS* 00000000 _
STACK_START
Contents of section .text:
Contents of section .text:
0000 3c090000 25291000 3c0a0000 254a1010 <...%)..<...%J..
0000 27bdfff0 3c010000 24221018 3c010000 '...<...$"..<...
0010 24080000 812b0000 11600003 25080001 $....+...`..%...
0010 24231018 0062082b 10200006 00000000 $#...b.+. ......
0020 25290001 1000fffb 01485021 a14b0000 %).......HP!.K..
0020 ac600000 24630004 0062082b 1420fffc .`..$c...b.+. ..
0030 3c090000 25291000 1000ffff <...%)......
0030 00000000 3c010000 2422100b 3c010000 ....<...$"..<...
0040 24231000 0062082b 10200009 00000000 $#...b.+. ......
0050 3c010000 24241000 8c810000 ac610000 <...$$.......a..
0060 24630004 0062082b 1420fffb 24840004 $c...b.+. ..$...
0070 0c000037 00000000 0000000d 10a00015 ...7............
0080 00000000 27bdfff0 afbf000c afb20008 ....'...........
0090 afb10004 afb00000 24b2ffff 00808825 ........$......%
00a0 24840001 00c08025 02402825 0c00001f $......%.@(%....
00b0 02403825 02120821 92220000 8fb00000 .@8%...!."......
00c0 8fb10004 8fb20008 8fbf000c a0220000 ............."..
00d0 27bd0010 03e00008 00000000 27bdfff0 '...........'...
00e0 afbf000c 3c010000 27a60000 2405000b ....<...'...$...
00f0 2407000b aba00007 bba0000a afa00004 $...............
0100 afa00000 0c00001f 24241000 93a1000a ........$$......
0110 93a10009 93a10008 93a10007 93a10006 ................
0120 93a10005 93a10004 93a10003 93a10002 ................
0130 93a10001 93a10000 0800004e 00000000 ...........N....
Contents of section .data:
Contents of section .data:
1000 21646c72 6f57206f 6c6c6548 00000000 !dlroW olleH....
1000 48656c6c 6f20576f 726421 Hello Word!
1010 78787878 78787878 78787878 78787878 xxxxxxxxxxxxxxxx
1020 78787878 78787878 78787878 78787878 xxxxxxxxxxxxxxxx
1030 00000000 00000000 00000000 00000000 ................
Contents of section .reginfo:
0000 10000f00 00000000 00000000 00000000 ................
0010 00000000 00000000 ........
Disassembly of section .text:
Disassembly of section .text:
00000000 <_start>:
00000000 <_start>:
0: 27bdfff0 addiu sp,sp,-16
0: 27bdfff0 addiu sp,sp,-16
4: 3c010000 lui at,0x0
4: 3c010000 lui at,0x0
8: 242210
00
addiu v0,at,4
096
8: 242210
18
addiu v0,at,4
120
c: 3c010000 lui at,0x0
c: 3c010000 lui at,0x0
10: 242310
00
addiu v1,at,4
096
10: 242310
18
addiu v1,at,4
120
14: 0062082b sltu at,v1,v0
14: 0062082b sltu at,v1,v0
18: 10200006 beqz at,34 <START_ADDR+0x34>
18: 10200006 beqz at,34 <START_ADDR+0x34>
1c: 00000000 nop
1c: 00000000 nop
...
@@ -62,7 +80,7 @@ Disassembly of section .text:
...
@@ -62,7 +80,7 @@ Disassembly of section .text:
2c: 1420fffc bnez at,20 <START_ADDR+0x20>
2c: 1420fffc bnez at,20 <START_ADDR+0x20>
30: 00000000 nop
30: 00000000 nop
34: 3c010000 lui at,0x0
34: 3c010000 lui at,0x0
38: 2422100
0
addiu v0,at,4
096
38: 2422100
b
addiu v0,at,4
107
3c: 3c010000 lui at,0x0
3c: 3c010000 lui at,0x0
40: 24231000 addiu v1,at,4096
40: 24231000 addiu v1,at,4096
44: 0062082b sltu at,v1,v0
44: 0062082b sltu at,v1,v0
...
@@ -118,7 +136,7 @@ Disassembly of section .text:
...
@@ -118,7 +136,7 @@ Disassembly of section .text:
fc: afa00004 sw zero,4(sp)
fc: afa00004 sw zero,4(sp)
100: afa00000 sw zero,0(sp)
100: afa00000 sw zero,0(sp)
104: 0c00001f jal 7c <_ZN7reverse3rev17h10307c82767293bfE>
104: 0c00001f jal 7c <_ZN7reverse3rev17h10307c82767293bfE>
108: 2424
017
0 addiu a0,at,
368
108: 2424
100
0 addiu a0,at,
4096
10c: 93a1000a lbu at,10(sp)
10c: 93a1000a lbu at,10(sp)
110: 93a10009 lbu at,9(sp)
110: 93a10009 lbu at,9(sp)
114: 93a10008 lbu at,8(sp)
114: 93a10008 lbu at,8(sp)
...
...
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