Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
R
rtic_f4xx_nucleo
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Per Lindgren
rtic_f4xx_nucleo
Commits
37c7b33b
Commit
37c7b33b
authored
4 years ago
by
Per Lindgren
Browse files
Options
Downloads
Patches
Plain Diff
readme updated
parent
ccbd9377
No related branches found
No related tags found
No related merge requests found
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
README.md
+17
-2
17 additions, 2 deletions
README.md
with
17 additions
and
2 deletions
README.md
+
17
−
2
View file @
37c7b33b
...
...
@@ -41,14 +41,29 @@ You may use any editor of choice. `vscode` supports Rust using the `rust-analyz
-
`examples/rtt_timing.rs`
Here you will learn about cycle accurate timing measurements
.
Here you will learn about cycle accurate timing measurements
:
-
Using instrumentation code (which introduces bloat and overhead).
-
Non intrusive measurements using the on-chip debug unit and
`gdb`
.
-
Code generation optimization
-
Code generation optimization
.
-
Code inspection,
`objdump`
, debugging and interactive
`disassemble`
.
-
Code trimming, RTIC is "A Zero-Cost Abstraction for Memory Safe Concurrency".
-
`examples/timing_task.rs`
Here you learn about the Nested Vector Interrupt Controller:
-
Tasks are bound to interrupt vectors.
-
Tasks can be pended either by code or by the environment (e.g. on arrival of serial data).
-
The
`bkpt`
can be inserted in the code to trigger a breakpoint (useful to timing measurements).
-
RTIC has zero-cost task dispatch overhead (well 2-clock cycles but will be fixed to zero).
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment