Initial commit

.gitignore

+/target

Cargo.lock

+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+[[package]]
+name = "rsim"
+version = "0.1.0"

Cargo.toml

+[package]
+name = "rsim"
+version = "0.1.0"
+authors = ["Per Lindgren <per.lindgren@ltu.se>"]
+edition = "2018"
+
+# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
+
+[dependencies]

src/lib.rs

+use std::convert::{From, Into};
+use std::fmt;
+use std::ops::{BitAnd, Index};
+use std::string::String;
+
+#[derive(Debug, PartialEq, Clone)]
+pub struct Signal(Vec<bool>);
+
+impl Signal {
+    pub fn new() -> Self {
+        Self { 0: Vec::new() }
+    }
+
+    pub fn new_zeroed(n: usize) -> Self {
+        let mut bs = Signal::new();
+        for i in 0..n {
+            bs.push(false)
+        }
+        bs
+    }
+
+    pub fn push(&mut self, b: bool) {
+        self.0.push(b)
+    }
+
+    pub fn pop(&mut self) -> Option<bool> {
+        self.0.pop()
+    }
+
+    pub fn set(&mut self, i: usize, b: bool) {
+        self.0[i] = b;
+    }
+}
+
+impl fmt::Binary for Signal {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let mut s = String::new();
+        for i in self.0.iter().rev() {
+            s.push(if *i { '1' } else { '0' });
+        }
+        write!(f, "{}", s)
+    }
+}
+
+impl Index<usize> for Signal {
+    type Output = bool;
+
+    #[inline]
+    fn index(&self, index: usize) -> &Self::Output {
+        &self.0[index]
+    }
+}
+
+// operations on signal
+impl BitAnd for &Signal {
+    type Output = Signal;
+
+    // rhs is the "right-hand side" of the expression `a & b`
+    fn bitand(self, rhs: Self) -> Self::Output {
+        let mut bs = Signal::new();
+        for (a, b) in self.0.iter().zip(&rhs.0) {
+            bs.push(a & b);
+        }
+        bs
+    }
+}
+
+impl From<u8> for Signal {
+    fn from(u: u8) -> Self {
+        let mut bs = Signal::new();
+        for i in 0..8 {
+            bs.push(u & (1 << i) != 0)
+        }
+        bs
+    }
+}
+
+impl From<Signal> for u8 {
+    fn from(b: Signal) -> u8 {
+        let mut u = 0;
+        for (n, b) in b.0.iter().enumerate() {
+            u |= if *b { 1 << n } else { 0 }
+        }
+        u
+    }
+}
+
+impl From<u32> for Signal {
+    fn from(u: u32) -> Self {
+        let mut bs = Signal::new();
+        for i in 0..32 {
+            bs.push(u & (1 << i) != 0)
+        }
+        bs
+    }
+}
+
+impl From<Signal> for u32 {
+    fn from(b: Signal) -> u32 {
+        let mut u = 0;
+        for (n, b) in b.0.iter().enumerate() {
+            u |= if *b { 1 << n } else { 0 }
+        }
+        u
+    }
+}
+
+#[test]
+fn test_partial_eq() {
+    let b: Signal = 12345u32.into();
+    let c: Signal = 1245u32.into();
+    assert!(b != c);
+    assert!(b == b);
+}
+
+#[test]
+fn test_and() {
+    let a = 0x15u8;
+    let b = 0x51u8;
+
+    let a_bs: Signal = a.into();
+    let b_bs: Signal = b.into();
+    let c_bs = &a_bs & &b_bs;
+    assert!(a & b == c_bs.into());
+}

src/main.rs

+use rsim::*;
+
+fn main() {
+    let b: Signal = 12345u32.into();
+    let c: Signal = 1245u32.into();
+
+    let s: Signal = Signal::new_zeroed(5);
+
+    let b8: Signal = 0b0000_1010u8.into();
+
+    for i in 0..8 {
+        println!("b8[{}] {}", i, b8[i]);
+    }
+
+    println!("b8 {:b}", b8);
+
+    println!("s {:b}", s);
+
+    println!("{:?}", s);
+
+    if b == c {
+        println!("eq");
+    }
+
+    println!("b {:?}", b);
+
+    let i: u32 = b.into();
+    println!("i {:?}", i);
+
+    let a: Signal = 0b1001_0101u8.into();
+    let b: Signal = 0b1111_0000u8.into();
+    let c: Signal = &a & &b;
+
+    println!("{:?}", a);
+    println!("{:?}", b);
+    println!("{:?}", c);
+
+    let r: u8 = (&a & &b).into();
+}