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Commit f35ce3d6 authored by Per's avatar Per
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generic

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.gdbinit_old deleted 100644 → 0
+ 0
− 18
View file @ 45009814
target remote :3333
monitor arm semihosting enable
# # send captured ITM to the file itm.fifo
# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
# # 8000000 must match the core clock frequency
# monitor tpiu config internal itm.fifo uart off 8000000
# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
# # 2000000 is the frequency of the SWO pin
# monitor tpiu config external uart off 8000000 2000000
# # enable ITM port 0
# monitor itm port 0 on
load
step
.settings/com.github.rustdt.ide.core.prefs deleted 100644 → 0
+ 0
− 2
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build_targets=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<build_targets xmlns\="com.github.rustdt.ide.core">\n<target auto_enabled\="false" config\="build" n_enabled\="true" version2\="true">\n<command_invocation append_env\="true" command_arguments\="xargo build --release --message-format\=json">\n<env_vars/>\n</command_invocation>\n</target>\n<target auto_enabled\="true" config\="check" n_enabled\="false" version2\="true">\n<command_invocation append_env\="true" command_arguments\="xargo build --message-format\=json">\n<env_vars/>\n</command_invocation>\n</target>\n<target auto_enabled\="false" config\="clean" n_enabled\="false" version2\="true"/>\n</build_targets>\n
eclipse.preferences.version=1
.vscode/launch.json
+ 70
− 4
View file @ f35ce3d6
...@@ -9,13 +9,13 @@ ...@@ -9,13 +9,13 @@
"request": "attach", "request": "attach",
"name": "Release", "name": "Release",
"gdbpath": "/usr/bin/arm-none-eabi-gdb", "gdbpath": "/usr/bin/arm-none-eabi-gdb",
//"executable": "./target/thumbv7em-none-eabihf/release/bluepill", //"executable": "./target/thumbv7em-none-eabihf/release/nucleo",
"target": ":3333", "target": ":3333",
"remote": true, "remote": true,
"autorun": [ "autorun": [
"monitor arm semihosting enable", "monitor arm semihosting enable",
"monitor reset init", "monitor reset init",
"file ./target/thumbv7em-none-eabihf/release/bluepill", "file ./target/thumbv7em-none-eabihf/release/nucleo",
"load" "load"
], ],
"cwd": "${workspaceRoot}" "cwd": "${workspaceRoot}"
...@@ -25,13 +25,79 @@ ...@@ -25,13 +25,79 @@
"request": "attach", "request": "attach",
"name": "Debug", "name": "Debug",
"gdbpath": "/usr/bin/arm-none-eabi-gdb", "gdbpath": "/usr/bin/arm-none-eabi-gdb",
//"executable": "./target/thumbv7em-none-eabihf/debug/bluepill", //"executable": "./target/thumbv7em-none-eabihf/debug/nucleo",
"target": ":3333", "target": ":3333",
"remote": true, "remote": true,
"autorun": [ "autorun": [
"monitor reset init", "monitor reset init",
"monitor arm semihosting enable", "monitor arm semihosting enable",
"file ./target/thumbv7em-none-eabihf/debug/bluepill", "file ./target/thumbv7em-none-eabihf/debug/nucleo",
"load"
],
"cwd": "${workspaceRoot}"
},
{
"type": "gdb",
"request": "attach",
"name": "Debug hello",
"gdbpath": "/usr/bin/arm-none-eabi-gdb",
//"executable": "./target/thumbv7em-none-eabihf/debug/nucleo",
"target": ":3333",
"remote": true,
"autorun": [
"monitor reset init",
"monitor arm semihosting enable",
"file ./target/thumbv7em-none-eabihf/debug/examples/hello",
"load"
],
"cwd": "${workspaceRoot}"
},
{
"type": "gdb",
"request": "attach",
"name": "Debug crash",
"gdbpath": "/usr/bin/arm-none-eabi-gdb",
//"executable": "./target/thumbv7em-none-eabihf/debug/nucleo",
"target": ":3333",
"remote": true,
"autorun": [
"monitor reset init",
"monitor arm semihosting enable",
"file ./target/thumbv7em-none-eabihf/debug/examples/crash",
"load"
],
"cwd": "${workspaceRoot}"
},
{
"type": "gdb",
"request": "attach",
"name": "Debug itm",
"gdbpath": "/usr/bin/arm-none-eabi-gdb",
//"executable": "./target/thumbv7em-none-eabihf/debug/nucleo",
"target": ":3333",
"remote": true,
"autorun": [
"monitor reset init",
//"monitor arm semihosting enable",
"monitor tpiu config internal /tmp/itm.fifo uart off 64000000",
//"monitor tpiu config internal /tmp/itm.fifo uart off 16000000",
"file ./target/thumbv7em-none-eabihf/debug/examples/itm",
"load"
],
"cwd": "${workspaceRoot}"
},
{
"type": "gdb",
"request": "attach",
"name": "Debug override",
"gdbpath": "/usr/bin/arm-none-eabi-gdb",
//"executable": "./target/thumbv7em-none-eabihf/debug/nucleo",
"target": ":3333",
"remote": true,
"autorun": [
"monitor reset init",
"monitor arm semihosting enable",
"file ./target/thumbv7em-none-eabihf/debug/examples/override-exception-handler",
"load" "load"
], ],
"cwd": "${workspaceRoot}" "cwd": "${workspaceRoot}"
......
.vscode/tasks.json
+ 52
− 0
View file @ f35ce3d6
...@@ -7,6 +7,10 @@ ...@@ -7,6 +7,10 @@
"taskName": "xargo build --release", "taskName": "xargo build --release",
"type": "shell", "type": "shell",
"command": "xargo build --release", "command": "xargo build --release",
"group": {
"kind": "build",
"isDefault": true
},
"problemMatcher": [ "problemMatcher": [
"$rustc" "$rustc"
] ]
...@@ -22,6 +26,54 @@ ...@@ -22,6 +26,54 @@
"problemMatcher": [ "problemMatcher": [
"$rustc" "$rustc"
] ]
},
{
"taskName": "xargo build --example hello",
"type": "shell",
"command": "xargo build --example hello",
"group": {
"kind": "build",
"isDefault": true
},
"problemMatcher": [
"$rustc"
]
},
{
"taskName": "xargo build --example crash",
"type": "shell",
"command": "xargo build --example crash",
"group": {
"kind": "build",
"isDefault": true
},
"problemMatcher": [
"$rustc"
]
},
{
"taskName": "xargo build --example itm",
"type": "shell",
"command": "xargo build --example itm",
"group": {
"kind": "build",
"isDefault": true
},
"problemMatcher": [
"$rustc"
]
},
{
"taskName": "xargo build --example override-exception-handler",
"type": "shell",
"command": "xargo build --example override-exception-handler",
"group": {
"kind": "build",
"isDefault": true
},
"problemMatcher": [
"$rustc"
]
} }
] ]
} }
\ No newline at end of file
Cargo.toml
+ 2
− 9
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...@@ -11,18 +11,15 @@ ...@@ -11,18 +11,15 @@
# will likely look very different (and much more reasonable) # will likely look very different (and much more reasonable)
[package] [package]
name = "bluepill" name = "nucleo"
version = "0.2.1" version = "0.2.1"
authors = ["per lindgren"] authors = ["per lindgren"]
description = "are we blue yet" description = "are we nucleo yet"
keywords = ["arm", "cortex-m", "template"] keywords = ["arm", "cortex-m", "template"]
categories = ["embedded", "no-std"] categories = ["embedded", "no-std"]
license = "MIT OR Apache-2.0" license = "MIT OR Apache-2.0"
repository = "not defined" repository = "not defined"
[dependencies.blue-pill]
git = "https://github.com/japaric/blue-pill"
[dependencies.cortex-m-semihosting] [dependencies.cortex-m-semihosting]
version = "0.2.0" version = "0.2.0"
...@@ -33,10 +30,6 @@ features = ["abort-on-panic"] ...@@ -33,10 +30,6 @@ features = ["abort-on-panic"]
[dependencies.cortex-m] [dependencies.cortex-m]
version = "0.3.0" version = "0.3.0"
[dependencies.stm32f103xx]
features = ["rt"]
version = "0.7.4"
[profile.release] [profile.release]
lto = true lto = true
debug = true debug = true
\ No newline at end of file
examples/allocator.rs deleted 100644 → 0
+ 0
− 79
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//! How to use the heap and a dynamic memory allocator
//!
//! To compile this example you'll need to build the collections crate as part
//! of the Xargo sysroot. To do that change the Xargo.toml file to look like
//! this:
//!
//! ``` text
//! [dependencies.core]
//! stage = 0
//!
//! [dependencies.collections] # NEW
//! stage = 0
//!
//! [dependencies.compiler_builtins]
//! stage = 1
//! ```
//!
//! This example depends on the alloc-cortex-m crate so you'll have to add it
//! to your Cargo.toml:
//!
//! ``` text
//! # or edit the Cargo.toml file manually
//! $ cargo add alloc-cortex-m
//! ```
//!
//! ---
#[allow(deprecated)]
#![feature(collections)]
#![feature(used)]
#![no_std]
// This is the allocator crate; you can use a different one
extern crate alloc_cortex_m;
#[macro_use]
extern crate collections;
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate cortex_m_semihosting;
use core::fmt::Write;
use cortex_m::asm;
use cortex_m_semihosting::hio;
fn main() {
// Initialize the allocator
unsafe {
extern "C" {
// Start of the heap
static mut _sheap: usize;
}
// Size of the heap in words (1 word = 4 bytes)
// NOTE The bigger the heap the greater the chance to run into a stack
// overflow (collision between the stack and the heap)
const SIZE: isize = 256;
// End of the heap
let _eheap = (&mut _sheap as *mut _).offset(SIZE);
alloc_cortex_m::init(&mut _sheap, _eheap);
}
// Growable array allocated on the heap
let xs = vec![0, 1, 2];
let mut stdout = hio::hstdout().unwrap();
writeln!(stdout, "{:?}", xs).unwrap();
}
// As we are not using interrupts, we just register a dummy catch all handler
#[link_section = ".vector_table.interrupts"]
#[used]
static INTERRUPTS: [extern "C" fn(); 240] = [default_handler; 240];
extern "C" fn default_handler() {
asm::bkpt();
}
examples/device.rs deleted 100644 → 0
+ 0
− 93
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//! Using a device crate
//!
//! Crates generated using [`svd2rust`] are referred to as device crates. These
//! crates provides an API to access the peripherals of a device. When you
//! depend on one of these crates and the "rt" feature is enabled you don't need
//! link to the cortex-m-rt crate.
//!
//! [`svd2rust`]: https://crates.io/crates/svd2rust
//!
//! Device crates also provide an `interrupt!` macro to register interrupt
//! handlers.
//!
//! This example depends on the [`stm32f103xx`] crate so you'll have to add it
//! to your Cargo.toml.
//!
//! [`stm32f103xx`]: https://crates.io/crates/stm32f103xx
//!
//! ```
//! $ edit Cargo.toml && cat $_
//! [dependencies.stm32f103xx]
//! features = ["rt"]
//! version = "0.7.0"
//! ```
//!
//! ---
#![deny(warnings)]
#![feature(const_fn)]
#![no_std]
extern crate cortex_m;
extern crate cortex_m_semihosting;
#[macro_use(exception, interrupt)]
extern crate stm32f103xx;
use core::cell::RefCell;
use core::fmt::Write;
use cortex_m::interrupt::{self, Mutex};
use cortex_m::peripheral::SystClkSource;
use cortex_m_semihosting::hio::{self, HStdout};
use stm32f103xx::Interrupt;
static HSTDOUT: Mutex<RefCell<Option<HStdout>>> =
Mutex::new(RefCell::new(None));
fn main() {
interrupt::free(|cs| {
let hstdout = HSTDOUT.borrow(cs);
if let Ok(fd) = hio::hstdout() {
*hstdout.borrow_mut() = Some(fd);
}
let nvic = stm32f103xx::NVIC.borrow(cs);
nvic.enable(Interrupt::TIM2);
let syst = stm32f103xx::SYST.borrow(cs);
syst.set_clock_source(SystClkSource::Core);
syst.set_reload(8_000_000); // 1s
syst.enable_counter();
syst.enable_interrupt();
});
}
exception!(SYS_TICK, tick);
fn tick() {
interrupt::free(|cs| {
let hstdout = HSTDOUT.borrow(cs);
if let Some(hstdout) = hstdout.borrow_mut().as_mut() {
writeln!(*hstdout, "Tick").ok();
}
let nvic = stm32f103xx::NVIC.borrow(cs);
nvic.set_pending(Interrupt::TIM2);
});
}
interrupt!(TIM2, tock, locals: {
tocks: u32 = 0;
});
fn tock(l: &mut TIM2::Locals) {
l.tocks += 1;
interrupt::free(|cs| {
let hstdout = HSTDOUT.borrow(cs);
if let Some(hstdout) = hstdout.borrow_mut().as_mut() {
writeln!(*hstdout, "Tock ({})", l.tocks).ok();
}
});
}
src/main.rs
+ 7
− 2
View file @ f35ce3d6
...@@ -228,17 +228,19 @@ fn decode(wordarr: &[u32], bytearr: &mut [u8], seed: &mut u32) -> u32 { ...@@ -228,17 +228,19 @@ fn decode(wordarr: &[u32], bytearr: &mut [u8], seed: &mut u32) -> u32 {
#[inline(never)] #[inline(never)]
fn main() { fn main() {
let mut stdout = hio::hstdout().unwrap(); let mut stdout = hio::hstdout().unwrap();
// *0xe000_1004
// test that codgen works // test that codgen works
let mut seed = 0x3e944b9f; let mut seed = 0x3e944b9f;
writeln!(stdout, "{:#08x}", codgen(&mut seed)).unwrap(); writeln!(stdout, "{:#08x}", codgen(&mut seed)).unwrap();
seed = 0x0e0657c1; seed = 0x0e0657c1;
asm::bkpt(); //asm::bkpt();
unsafe { unsafe {
(*DWT.get()).enable_cycle_counter(); (*DWT.get()).enable_cycle_counter();
(*DWT.get()).cyccnt.write(0); (*DWT.get()).cyccnt.write(0);
} }
asm::bkpt(); //asm::bkpt();
decode(&ABC, unsafe { &mut PLAIN }, &mut seed); decode(&ABC, unsafe { &mut PLAIN }, &mut seed);
asm::bkpt(); asm::bkpt();
writeln!( writeln!(
...@@ -246,6 +248,9 @@ fn main() { ...@@ -246,6 +248,9 @@ fn main() {
"plain string {}", "plain string {}",
from_utf8(unsafe { &PLAIN }).unwrap() from_utf8(unsafe { &PLAIN }).unwrap()
).unwrap(); ).unwrap();
loop {
asm::bkpt();
}
} }
// As we are not using interrupts, we just register a dummy catch all handler // As we are not using interrupts, we just register a dummy catch all handler
......
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