gpio now works

.vscode/launch.json

@@ -20,6 +20,23 @@
                 "load"
             ],
             "cwd": "${workspaceRoot}"
+        },
+        {
+            "type": "gdb",
+            "request": "attach",
+            "name": "Debug gpio",
+            "gdbpath": "/usr/bin/arm-none-eabi-gdb",
+            //"executable": ".target/thumbv7em-none-eabihf/debug/examples/hello",
+            "target": ":3333",
+            "remote": true,
+            //"debugger_args": [],
+            "autorun": [
+                "monitor reset halt",
+                "monitor arm semihosting enable",
+                "file ./target/thumbv7em-none-eabihf/debug/examples/gpio",
+                "load"
+            ],
+            "cwd": "${workspaceRoot}"
         }
     ]
 }
\ No newline at end of file

.vscode/tasks.json

@@ -19,6 +19,18 @@
             "taskName": "xargo build --example hello",
             "type": "shell",
             "command": "xargo build --example hello",
+            // "group": {
+            //     "kind": "build",
+            //     "isDefault": true
+            // },
+            "problemMatcher": [
+                "$rustc"
+            ]
+        },
+        {
+            "taskName": "xargo build --example gpio",
+            "type": "shell",
+            "command": "xargo build --example gpio",
             "group": {
                 "kind": "build",
                 "isDefault": true

examples/gpio.rs

-//! Sets PB12 high
+//! Toggles PA5, connected to the Nucleo-64 LED2
 #![deny(unsafe_code)]
 #![deny(warnings)]
 #![feature(proc_macro)]
 #![no_std]
 
-extern crate blue_pill;
 extern crate cortex_m_rtfm as rtfm;
+extern crate cortex_m_semihosting as semihosting;
+extern crate nucleo_64;
+
+use nucleo_64::gpio::PA5;
+extern crate stm32f40x;
 
-use blue_pill::gpio::{self, PB12};
 use rtfm::app;
+use semihosting::hio;
+
+use core::fmt::Write;
 
 app! {
-    device: blue_pill::stm32f103xx,
+    device: nucleo_64::stm32f40x,
 }
 
 fn init(p: init::Peripherals) {
-    gpio::init(p.GPIOB, p.RCC);
+    writeln!(hio::hstdout().unwrap(), "Init!").unwrap();
+    // RM0368 6.3.9
+    // enable clock to GPIOA
+    p.RCC.ahb1enr.modify(|_, w| w.gpioaen().enable());
+
+    // RM0368 8.4.1
+    // set output mode for GPIOA
+    p.GPIOA.moder.modify(|_, w| {
+        w.moder5()
+            .variant(stm32f40x::gpioa::moder::MODER15W::OUTPUTMODE)
+    });
 }
 
 fn idle() -> ! {
-    PB12.high();
-
+    writeln!(hio::hstdout().unwrap(), "PA5 high!").unwrap();
+    PA5.high();
+    writeln!(hio::hstdout().unwrap(), "PA5 low!").unwrap();
+    PA5.low();
     // Sleep
     loop {
         rtfm::wfi();

src/gpio.rs

 //! General Purpose I/O
 //!
-//! - PB12
-//! - PB13
-//! - PB14
-//! - PB15
+//! - PA0 - PA15
 
-use stm32f103xx::{GPIOB, RCC};
-
-/// Initializes the digital outputs
-pub fn init(gpiob: &GPIOB, rcc: &RCC) {
-    rcc.apb2enr.modify(|_, w| w.iopben().enabled());
-
-    gpiob.crh.modify(|_, w| {
-        w.mode12()
-            .bits(0b10)
-            .cnf12()
-            .bits(0b00)
-            .mode13()
-            .bits(0b10)
-            .cnf13()
-            .bits(0b00)
-            .mode14()
-            .bits(0b10)
-            .cnf14()
-            .bits(0b00)
-            .mode15()
-            .bits(0b10)
-            .cnf15()
-            .bits(0b00)
-    });
-}
+use stm32f40x::{GPIOA, RCC};
+use stm32f40x;
 
 macro_rules! pin {
-    ($PBX:ident, $bsX:ident, $brX:ident) => {
+    ($PAX:ident, $bsX:ident, $brX:ident) => {
         /// Digital output
-        pub struct $PBX;
+        pub struct $PAX;
 
-        impl $PBX {
+        impl $PAX {
             /// Sets the pin "high" (3V3)
             pub fn high(&self) {
                 // NOTE(safe) atomic write
                 unsafe {
-                    (*GPIOB.get()).bsrr.write(|w| w.$bsX().bit(true));
+                    (*GPIOA.get()).bsrr.write(|w| w.$bsX().bit(true));
                 }
             }
 
@@ -49,14 +23,26 @@ macro_rules! pin {
             pub fn low(&self) {
                 // NOTE(safe) atomic write
                 unsafe {
-                    (*GPIOB.get()).bsrr.write(|w| w.$brX().bit(true));
+                    (*GPIOA.get()).bsrr.write(|w| w.$brX().bit(true));
                 }
             }
         }
     }
 }
 
-pin!(PB12, bs12, br12);
-pin!(PB13, bs13, br13);
-pin!(PB14, bs14, br14);
-pin!(PB15, bs15, br15);
+pin!(PA0, bs0, br0);
+pin!(PA1, bs1, br1);
+pin!(PA2, bs2, br2);
+pin!(PA3, bs3, br3);
+pin!(PA4, bs4, br4);
+pin!(PA5, bs5, br5);
+pin!(PA6, bs6, br6);
+pin!(PA7, bs7, br7);
+pin!(PA8, bs8, br8);
+pin!(PA9, bs9, br9);
+pin!(PA10, bs10, br10);
+pin!(PA11, bs11, br11);
+pin!(PA12, bs12, br12);
+pin!(PA13, bs13, br13);
+pin!(PA14, bs14, br14);
+pin!(PA15, bs15, br15);

src/lib.rs

@@ -31,7 +31,7 @@ pub extern crate stm32f40x;
 // pub mod adc;
 // pub mod capture;
 // pub mod dma;
-// pub mod gpio;
+pub mod gpio;
 // pub mod led;
 // pub mod pwm;
 // pub mod qei;