usart_clk

examples/usart_clk.rs

@@ -41,10 +41,6 @@ fn serial_init(p: &init::Peripherals) {
     // enable clock to
     p.RCC.apb1enr.modify(|_, w| w.usart2en().bit(true));
 
-    // PA2 = TX, PA3 = RX
-    // p.AFIO.mapr.modify(|_, w| w.usart2_remap().clear_bit());
-
-
     // RM0368 8.4.1
     // set output mode for GPIOA
     // PA2 = TX (output mode), PA3 = RX (input mode)
@@ -106,16 +102,14 @@ fn clk_init(p: &init::Peripherals) {
     // setting up the flash memory latency
     // RM0368 8.4.1 (register), 3.4 Table 6
     // we assume 3.3 volt operation, thus 2 cycles for 84mHz
+    // apb1 will be at 42 MHz
     p.FLASH.acr.modify(|_, w| unsafe { w.latency().bits(2) });
-
-    p.FLASH.acr.modify(|_, w| unsafe { w.latency().bits(2) });
-    println!("Init! {:x}", p.FLASH.acr.read().latency().bits());
-
+    println!("Flash latency! {:x}", p.FLASH.acr.read().latency().bits());
 
     p.RCC
         .cfgr
         .modify(|_, w| w.sw0().clear_bit().sw1().clear_bit()); //Switch to HSI
-    p.RCC.cfgr.modify(|_, w| unsafe { w.ppre1().bits(4) }); //Configure apb1 prescaler = 2
+    p.RCC.cfgr.modify(|_, w| unsafe { w.ppre1().bits(4) }); //Configure apb1 prescaler = 2,
     p.RCC.apb1enr.modify(|_, w| w.pwren().set_bit());
     p.RCC.cr.write(|w| w.pllon().clear_bit());
 
@@ -123,6 +117,7 @@ fn clk_init(p: &init::Peripherals) {
     //					   PP	  PLLN	    PLLM
     // 0b0000 0000 0000 00 01 0 101010000 010000
     // RM0368 6.3.2
+    // PP 01
     p.RCC
         .pllcfgr
         .write(|w| unsafe { w.bits(0b00000000000000010101010000010000) }); //Configure PLL
@@ -131,22 +126,23 @@ fn clk_init(p: &init::Peripherals) {
 
     while p.RCC.cr.read().pllrdy().bit_is_clear() {}
 
-    p.RCC.cfgr.modify(|_, w| w.sw0().clear_bit()); //Switch to PLL
-    p.RCC.cfgr.modify(|_, w| w.sw1().set_bit()); //Switch to PLL
+    p.RCC
+        .cfgr
+        .modify(|_, w| w.sw0().clear_bit().sw1().set_bit()); //Switch to PLL
+
+    // System configuration controller clock enable
     p.RCC.apb2enr.modify(|_, w| w.syscfgen().set_bit());
 
     p.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); //Enable GPIOA clock
     p.RCC.ahb1enr.modify(|_, w| w.gpioben().set_bit()); //Enable GPIOB clock
-
-    //USART::send(p.USART2, "\n\n\nUSART initialized\n\r");
 }
 
 #[inline(never)]
 fn init(p: init::Peripherals) {
     println!("Init!");
-    clk_init(&p);
-    //serial_init(&p);
-    USART::initialize(p.GPIOA, p.RCC, p.USART2);
+    // clk_init(&p);
+    serial_init(&p);
+    //USART::initialize(p.GPIOA, p.RCC, p.USART2);
 
     USART::send(p.USART2, "\n\n\nUSART \n\r");
 

src/lib.rs

-//! Board Support Crate for the [Blue Pill]
-//!
-//! [Blue Pill]: http://wiki.stm32duino.com/index.php?title=Blue_Pill
+//! Board Support Crate for the [Nucleo 64 stm32f40x]
 //!
 //! # Usage
 //!
@@ -120,12 +118,13 @@ macro_rules! frequency {
     }
 }
 
-/// Advance High-performance Bus (AHA)
+/// Advance High-performance Bus (AHB1)
 pub mod ahb1 {
-    frequency!(16_000_000);
+    //frequency!(16_000_000);
+    frequency!(42_000_000);
 }
 
-/// Advance High-performance Bus (AHB)
+/// Advance High-performance Bus (AHB2)
 pub mod ahb2 {
     frequency!(16_000_000);
 }