Fix DMA channel selection, auto-format

examples/mco.rs

@@ -29,15 +29,19 @@ fn init(p: init::Peripherals) {
 
     // Configure PC9 as MCO_2 alternate function to output System clock
     p.RCC.ahb1enr.modify(|_, w| w.gpiocen().set_bit()); //Enable GPIOC clock
-    p.GPIOC.ospeedr.modify(|_,w| unsafe {w.ospeedr9().bits(0b11)}); //Highest output speed
+    p.GPIOC
+        .ospeedr
+        .modify(|_, w| unsafe { w.ospeedr9().bits(0b11) }); //Highest output speed
     p.GPIOC.afrh.modify(|_, w| unsafe { w.afrh9().bits(0) }); //Alternate function AF0 MCO_2 on pin 9
-    p.GPIOC.moder.modify(|_,w| unsafe {w.moder9().bits(0b10)}); //Alternate function push-pull
+    p.GPIOC
+        .moder
+        .modify(|_, w| unsafe { w.moder9().bits(0b10) }); //Alternate function push-pull
     p.RCC.cfgr.modify(|_, w| unsafe { w.mco2().bits(0b00) }); //MCO2 SYSCLK clock selected
     p.RCC.cfgr.modify(|_, w| unsafe { w.mco2pre().bits(0b110) }); //Divide SYSCLK by 4
 
     let sysclk = clock::set_100_mhz(&p.RCC, &p.FLASH);
     println!("SYSCLK set to {}", sysclk);
-    // PC9 should now output sysclk/4 MHz and PA8 the frequency of the HSI RC
+    // PC9 should now output SYSCLK/4 MHz and PA8 the frequency of the HSI RC
 
     led::init(&p.GPIOA, &p.RCC);
 }

examples/usart2-rx-dma.rs

+//! Test receiving serial data using the DMA. Program will stop at breakpoint after 8 bytes are received.
+#![deny(unsafe_code)]
+#![deny(warnings)]
+#![feature(const_fn)]
+#![feature(proc_macro)]
+#![no_std]
+
+extern crate cortex_m_rtfm as rtfm;
+extern crate f4;
+
+use f4::Serial;
+use f4::dma::{Buffer, Dma1Channel5};
+use f4::time::Hertz;
+use rtfm::{app, Threshold};
+
+const BAUD_RATE: Hertz = Hertz(115_200);
+
+app! {
+    device: f4::stm32f40x,
+
+    resources: {
+        static BUFFER: Buffer<[u8; 8], Dma1Channel5> = Buffer::new([0; 8]);
+    },
+
+    tasks: {
+        DMA1_STREAM5: {
+            path: transfer_done,
+            resources: [BUFFER, DMA1],
+        },
+    },
+}
+
+fn init(p: init::Peripherals, r: init::Resources) {
+    let serial = Serial(p.USART2);
+
+    serial.init(BAUD_RATE.invert(), Some(p.DMA1), p.GPIOA, p.RCC);
+
+    serial.read_exact(p.DMA1, r.BUFFER).unwrap();
+}
+
+fn idle() -> ! {
+    loop {
+        rtfm::wfi();
+    }
+}
+
+fn transfer_done(_t: &mut Threshold, r: DMA1_STREAM5::Resources) {
+    r.BUFFER.release(r.DMA1).unwrap();
+
+    rtfm::bkpt();
+}

examples/usart2-tx-dma.rs

+//! Test sending serial data using the DMA
+#![deny(unsafe_code)]
+#![deny(warnings)]
+#![feature(const_fn)]
+#![feature(proc_macro)]
+#![no_std]
+
+extern crate cortex_m_rtfm as rtfm;
+extern crate f4;
+
+use f4::Serial;
+use f4::dma::{Buffer, Dma1Channel6};
+use f4::time::Hertz;
+use rtfm::{app, Threshold};
+
+const BAUD_RATE: Hertz = Hertz(115_200);
+
+app! {
+    device: f4::stm32f40x,
+
+    resources: {
+        static BUFFER: Buffer<[u8; 15], Dma1Channel6> = Buffer::new([0; 15]);
+    },
+
+    tasks: {
+        DMA1_STREAM6: {
+            path: transfer_done,
+            resources: [BUFFER, DMA1],
+        },
+    },
+}
+
+fn init(p: init::Peripherals, r: init::Resources) {
+    let serial = Serial(p.USART2);
+
+    serial.init(BAUD_RATE.invert(), Some(p.DMA1), p.GPIOA, p.RCC);
+    r.BUFFER.borrow_mut().clone_from_slice(b"Hello, world!\r\n");
+
+    serial.write_all(p.DMA1, r.BUFFER).unwrap();
+}
+
+fn idle() -> ! {
+    loop {
+        rtfm::wfi();
+    }
+}
+
+fn transfer_done(_t: &mut Threshold, r: DMA1_STREAM6::Resources) {
+    r.BUFFER.release(r.DMA1).unwrap();
+
+    rtfm::bkpt();
+}

examples/ws2812.rs

@@ -7,8 +7,8 @@
 #![feature(proc_macro)]
 #![no_std]
 
-extern crate f4;
 extern crate cortex_m_rtfm as rtfm;
+extern crate f4;
 #[macro_use]
 extern crate nb;
 
@@ -38,7 +38,15 @@ app! {
 fn init(p: init::Peripherals, r: init::Resources) {
     let pwm = Pwm(p.TIM3);
 
-    pwm.init(FREQUENCY.invert(), Channel::_1, Some(p.DMA1), p.GPIOA, p.GPIOB, p.GPIOC, p.RCC);
+    pwm.init(
+        FREQUENCY.invert(),
+        Channel::_1,
+        Some(p.DMA1),
+        p.GPIOA,
+        p.GPIOB,
+        p.GPIOC,
+        p.RCC,
+    );
     pwm.enable(Channel::_1);
 
     // end of frame

src/capture.rs

@@ -36,7 +36,7 @@
 use core::any::{Any, TypeId};
 use core::u32;
 
-use cast::{u32};
+use cast::u32;
 use hal;
 use nb;
 use stm32f40x::{TIM1, TIM2, TIM3, TIM4, GPIOA, GPIOB, GPIOC, RCC};

src/clock.rs

@@ -37,8 +37,6 @@ fn calculate_pll(m: u8, n: u16, p: u8) -> (u32, u32) {
     (pll_bitmask, pll_output)
 }
 
-
-
 /// Set system clock
 pub fn set(rcc: &RCC, flash: &FLASH, m: u8, n: u16, p: u8) -> u32 {
     let (pll_bitmask, sysclk) = calculate_pll(m, n, p);

src/pwm.rs

@@ -244,6 +244,7 @@ macro_rules! impl_Pwm {
 
                     if tim.get_type_id() == TypeId::of::<TIM3>() {
                         // TIM3_CH4/UP
+                        // chsel: Channel 5 (RM0368 9.3.3 Table 27)
                         // pl: Medium priority
                         // msize: Memory size = 8 bits
                         // psize: Peripheral size = 16 bits
@@ -254,7 +255,9 @@ macro_rules! impl_Pwm {
                         // tceie: Transfer complete interrupt enabled
                         // en: Disabled
                         dma1.s2cr.write(|w| unsafe {
-                            w.pl()
+                            w.chsel()
+                                .bits(5)
+                                .pl()
                                 .bits(0b01)
                                 .msize()
                                 .bits(0b00)

src/serial.rs

@@ -123,12 +123,14 @@ where
             // AF7, Table 9
             // PA2 and PA3 is connected to USART2 TX and RX respectively
             gpio.afrl.modify(|_, w| w.afrl2().bits(7).afrl3().bits(7));
-            gpio.moder.modify(|_, w| w.moder2().bits(2).moder3().bits(2));
+            gpio.moder
+                .modify(|_, w| w.moder2().bits(2).moder3().bits(2));
         }
 
         if let Some(dma1) = dma1 {
             if usart.get_type_id() == TypeId::of::<USART2>() {
                 // TX DMA transfer
+                // chsel: Channel 4 (RM0368 9.3.3 Table 27)
                 // pl: Medium priority
                 // msize: Memory size = 8 bits
                 // psize: Peripheral size = 8 bits
@@ -136,10 +138,12 @@ where
                 // pinc: Peripheral increment mode disabled
                 // circ: Circular mode disabled
                 // dir: Transfer from memory to peripheral
-                // tceie: Transfer complete interrupt enabled
+                // tcie: Transfer complete interrupt enabled
                 // en: Disabled
                 dma1.s6cr.write(|w| unsafe {
-                    w.pl()
+                    w.chsel()
+                        .bits(4)
+                        .pl()
                         .bits(0b01)
                         .msize()
                         .bits(0b00)
@@ -160,6 +164,7 @@ where
                 });
 
                 // RX DMA transfer
+                // chsel: Channel 4 (RM0368 9.3.3 Table 27)
                 // pl: Medium priority
                 // msize: Memory size = 8 bits
                 // psize: Peripheral size = 8 bits
@@ -167,10 +172,12 @@ where
                 // pinc: Peripheral increment mode disabled
                 // circ: Circular mode disabled
                 // dir: Transfer from peripheral to memory
-                // tceie: Transfer complete interrupt enabled
+                // tcie: Transfer complete interrupt enabled
                 // en: Disabled
                 dma1.s5cr.write(|w| unsafe {
-                    w.pl()
+                    w.chsel()
+                        .bits(4)
+                        .pl()
                         .bits(0b01)
                         .msize()
                         .bits(0b00)