spi.rs

//! Serial Peripheral Interface
//!
//! You can use the `Spi` interface with these SPI instances
//!
//! # SPI1
//!
//! - NSS = PA4
//! - SCK = PA5
//! - MISO = PA6
//! - MOSI = PA7
//!
//! # SPI2
//!
//! - NSS = PB12
//! - SCK = PB13
//! - MISO = PB14
//! - MOSI = PB15
//!
//! # SPI3
//!
//! - NSS = PA15
//! - SCK = PB3
//! - MISO = PB4
//! - MOSI = PB5
//!
use core::any::{Any, TypeId};
use core::ptr;

use hal;
use nb;
use stm32f40x::{SPI1, SPI2, SPI3, GPIOA, GPIOB, RCC};

/// SPI result
pub type Result<T> = ::core::result::Result<T, nb::Error<Error>>;

/// SPI error
#[derive(Debug)]
pub enum Error {
    /// Overrun occurred
    Overrun,
    /// Mode fault occurred
    ModeFault,
    /// CRC error
    Crc,
    #[doc(hidden)] _Extensible,
}

/// Serial Peripheral Interface
pub struct Spi<'a, T>(pub &'a T)
where
    T: 'a;

/// Serial Peripheral Interface
macro_rules! impl_Spi {
    ($S:ident) => {
        impl<'a> Spi<'a, $S>
        {
            /// Initializes the SPI
            pub fn init(&self,
                    gpioa: &GPIOA, // TODO: Make these optional/implement custom init for each SPI
                    gpiob: &GPIOB,
                    rcc: &RCC) {
                let spi = self.0;

                if spi.get_type_id() == TypeId::of::<SPI1>() {
                    // enable SPI1, GPIOA
                    rcc.apb2enr.modify(|_, w| {
                        w.spi1en().set_bit()
                    });
                    rcc.ahb1enr.modify(|_, w| {