.gitignore

+# For PCBs designed using KiCad: http://www.kicad-pcb.org/
+# Format documentation: http://kicad-pcb.org/help/file-formats/
+
+# Temporary files
+*.000
+*.bak
+*.bck
+*.kicad_pcb-bak
+*.kicad_sch-bak
+*.kicad_prl
+*.sch-bak
+*~
+_autosave-*
+*.tmp
+*-save.pro
+*-save.kicad_pcb
+fp-info-cache
+
+# Netlist files (exported from Eeschema)
+*.net
+
+# Autorouter files (exported from Pcbnew)
+*.dsn
+*.ses
+
+# Exported BOM files
+*.xml
+*.csv
\ No newline at end of file

.vscode/settings.json

 {
     "cSpell.ignoreWords": [
+        "aisler",
         "datasheet",
         "datasheets",
+        "leds",
         "microcontroller",
+        "netlist",
         "nrst",
         "nucleo",
         "pinout"

CHANGELOG.md

+# CHANGELOG
+
+2021-01-20, Added `.gitignore`
+
+2021-01-18, Lab1 instructions and CHANGELOG.md
\ No newline at end of file