pmw3389.rs

#![deny(unsafe_code)]
// #![deny(warnings)]
#![no_main]
#![no_std]

use cortex_m::{iprintln, peripheral::DWT};
use embedded_hal::spi::MODE_3;
// use cortex_m_semihosting::hprintln;
use panic_halt as _;
use rtic::cyccnt::{Instant, U32Ext as _};
use stm32f4xx_hal::{dwt::Dwt, prelude::*, rcc::Clocks, spi::Spi, stm32};

//use crate::hal::gpio::{gpioa::PA0, Edge, Input, PullDown};
//use hal::spi::{Mode, Phase, Polarity};

#[rtic::app(device = stm32f4xx_hal::stm32, monotonic = rtic::cyccnt::CYCCNT, peripherals = true)]
const APP: () = {
    struct Resources {
        // late resources
        GPIOA: stm32::GPIOA,
        ITM: stm32::ITM,
    }
    #[init(schedule = [toggle])]
    fn init(cx: init::Context) -> init::LateResources {
        let mut core = cx.core;
        let device = cx.device;

        // Configure led:
        // power on GPIOA, RM0368 6.3.11
        device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit());
        // configure PA5 as output, RM0368 8.4.1
        device.GPIOA.moder.modify(|_, w| w.moder5().bits(1));

        // setup clocks
        let rcc = device.RCC.constrain();

        let clocks = rcc.cfgr.freeze();

        let stim = &mut core.ITM.stim[0];

        iprintln!(stim, "pmw3389");

        // Initialize (enable) the monotonic timer (CYCCNT)
        core.DCB.enable_trace();

        // Configure SPI
        // spi2
        // sck    - pb10, (yellow)
        // miso   - pc2, (red)
        // mosi   - pc3, (orange)
        // ncs    - pb4, (long yellow)
        // motion - (brown)
        //
        // +5, (white)
        // gnd, (black)

        let gpiob = device.GPIOB.split();
        let gpioc = device.GPIOC.split();

        let sck = gpiob.pb10.into_alternate_af5();
        let miso = gpioc.pc2.into_alternate_af5();
        let mosi = gpioc.pc3.into_alternate_af5();
        let cs = gpiob.pb4.into_push_pull_output();

        let spi = Spi::spi2(
            device.SPI2,
            (sck, miso, mosi),
            MODE_3,
            stm32f4xx_hal::time::KiloHertz(2000).into(),
            clocks,
        );

        let mut delay = DwtDelay::new(&mut core.DWT, clocks);
        iprintln!(stim, "clocks:\n hclk {}", clocks.hclk().0);

        // test the delay
        let t1 = stm32::DWT::get_cycle_count();
        delay.delay_us(1000);
        let t2 = stm32::DWT::get_cycle_count();

        iprintln!(stim, "t1 {}", t1);
        iprintln!(stim, "t2 {}", t2);

        // let t1 = stm32::DWT::get_cycle_count();
        // delay.delay_ms(1000);
        // let t2 = stm32::DWT::get_cycle_count();

        // iprintln!(stim, "t1 {}", t1);
        // iprintln!(stim, "t2 {}", t2);

        let mut pmw3389 = pmw3389::Pmw3389::new(spi, cs, delay).unwrap();
        let id = pmw3389.product_id().unwrap();
        iprintln!(stim, "id {}", id);

        let id = pmw3389
            .read_register(pmw3389::Register::RevisionId)
            .unwrap();
        iprintln!(stim, "rev {}", id);

        let id = pmw3389
            .read_register(pmw3389::Register::ShutterLower)
            .unwrap();
        iprintln!(stim, "lower {}", id);

        let id = pmw3389
            .read_register(pmw3389::Register::ShutterUpper)
            .unwrap();
        iprintln!(stim, "upper {}", id);

        let id = pmw3389.read_register(pmw3389::Register::SROMId).unwrap();
        iprintln!(stim, "sromid {}", id);

        let id = pmw3389
            .read_register(pmw3389::Register::InverseProductID)
            .unwrap();
        iprintln!(stim, "-id {}", id);

        let id = pmw3389
            .read_register(pmw3389::Register::RippleControl)
            .unwrap();
        iprintln!(stim, "ripple_control {:x}", id);

        pmw3389.write_register(pmw3389::Register::RippleControl, 10);

        let id = pmw3389
            .read_register(pmw3389::Register::RippleControl)
            .unwrap();
        iprintln!(stim, "ripple_control {:x}", id);

        // semantically, the monotonic timer is frozen at time "zero" during `init`
        // NOTE do *not* call `Instant::now` in this context; it will return a nonsense value
        // let now = cx.start; // the start time of the system

        // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future
        // cx.schedule.toggle(now + 8_000_000.cycles()).unwrap();

        // pass on late resources
        init::LateResources {
            GPIOA: device.GPIOA,
            ITM: core.ITM,
        }
    }

    #[task(resources = [GPIOA, ITM], schedule = [toggle])]
    fn toggle(cx: toggle::Context) {
        static mut TOGGLE: bool = false;
        iprintln!(&mut cx.resources.ITM.stim[0], "foo  @ {:?}", Instant::now());

        if *TOGGLE {
            cx.resources.GPIOA.bsrr.write(|w| w.bs5().set_bit());
        } else {
            cx.resources.GPIOA.bsrr.write(|w| w.br5().set_bit());
        }

        *TOGGLE = !*TOGGLE;
        cx.schedule
            .toggle(cx.scheduled + 8_000_000.cycles())
            .unwrap();
    }

    extern "C" {
        fn EXTI0();
    }
};

pub struct DwtDelay {
    clocks: Clocks,
}

impl DwtDelay {
    pub fn new(dwt: &mut stm32::DWT, clocks: Clocks) -> DwtDelay {
        // required on Cortex-M7 devices that software lock the DWT (e.g. STM32F7)
        stm32::DWT::unlock();
        dwt.enable_cycle_counter();
        Self { clocks }
    }
}

impl _embedded_hal_blocking_delay_DelayUs<u32> for DwtDelay {
    fn delay_us(&mut self, us: u32) {
        let freq_m_hertz = self.clocks.hclk().0 / 1_000_000;

        let start = stm32::DWT::get_cycle_count() as i32;
        let end = start.wrapping_add((us * freq_m_hertz) as i32);

        while (stm32::DWT::get_cycle_count() as i32).wrapping_sub(end) < 0 {
            // this nop should be ok as the `DWT::get_cycle_count() provides side effects
        }
    }
}

impl _embedded_hal_blocking_delay_DelayMs<u32> for DwtDelay {
    fn delay_ms(&mut self, ms: u32) {
        self.delay_us(ms * 1000)
    }
}
mod pmw3389 {
    use super::DwtDelay;

    use embedded_hal::blocking::spi::{Transfer, Write};
    use embedded_hal::digital::v2::OutputPin;
    // use embedded_hal::spi::Mode;
    use cortex_m::iprintln;
    use stm32f4xx_hal::prelude::*;

    #[allow(dead_code)]
    #[derive(Clone, Copy)]
    pub enum Register {
        ProductId = 0x00,
        RevisionId = 0x01,
        Motion = 0x02,
        DeltaXL = 0x03,
        DeltaXH = 0x04,
        DeltaYL = 0x05,
        DeltaYH = 0x06,
        SQUAL = 0x07,
        RawDataSum = 0x08,
        MaximumRawdata = 0x09,
        MinimumRawdata = 0x0A,
        ShutterLower = 0x0B,
        ShutterUpper = 0x0C,
        RippleControl = 0x0D,
        ResoultionL = 0x0E,
        ResolutionH = 0x0F,
        Config2 = 0x10,
        AngleTune = 0x11,
        FrameCapture = 0x12,
        SROMEnable = 0x13,
        RunDownshift = 0x14,
        Rest1RateLower = 0x15,
        Rest1RateUpper = 0x16,
        Rest1Downshift = 0x17,
        Rest2RateLower = 0x18,
        Rest2RateUpper = 0x19,
        Rest2Downshift = 0x1A,
        Rest3RateLower = 0x1B,
        Rest3RateUpper = 0x1C,
        Observation = 0x24,
        DataOutLower = 0x25,
        DataOutUpper = 0x26,
        RawDataDump = 0x29,
        SROMId = 0x2A,
        MinSQRun = 0x2B,
        RawDataThreshold = 0x2C,
        Control2 = 0x2D,
        Config5L = 0x2E,
        Config5H = 0x2F,
        PowerUpReset = 0x3A,
        Shutdown = 0x3B,
        InverseProductID = 0x3F,
        LiftCutoffTune3 = 0x41,
        AngleSnap = 0x42,
        LiftCutoffTune1 = 0x4A,
        MotionBurst = 0x50,
        LiftCutoffTune1Timeout = 0x58,
        LiftCutoffTune1MinLength = 0x5A,
        SROMLoadBurst = 0x62,
        LiftConfig = 0x63,
        RawDataBurst = 0x64,
        LiftCutoffTune2 = 0x65,
        LiftCutoffTune2Timeout = 0x71,
        LiftCutoffTune2MinLength = 0x72,
        PWMPeriodCnt = 0x73,
        PWMWidthCnt = 0x74,
    }

    impl Register {
        fn addr(self) -> u8 {
            self as u8
        }
    }

    // const READ: u8 = 1 << 7;
    // const WRITE: u8 = 0 << 7;
    // const MULTI: u8 = 1 << 6;
    // const SINGLE: u8 = 0 << 6;

    pub struct Pmw3389<SPI, CS> {
        spi: SPI,
        cs: CS,
        delay: DwtDelay,
    }

    impl<SPI, CS, E> Pmw3389<SPI, CS>
    where
        SPI: Transfer<u8, Error = E> + Write<u8, Error = E>,
        CS: OutputPin,
    {
        /// Creates a new driver from a SPI peripheral and a NCS pin
        pub fn new(spi: SPI, cs: CS, delay: DwtDelay) -> Result<Self, E> {
            let mut pmw3389 = Pmw3389 { spi, cs, delay };

            // power up code here?
            // download firmware etc.

            Ok(pmw3389)
        }

        pub fn read_register(&mut self, reg: Register) -> Result<u8, E> {
            let _ = self.cs.set_low();

            let mut buffer = [reg.addr() & 0x7f, 0];
            self.spi.transfer(&mut buffer)?;

            // tSCLK-NCS for read operation is 120ns
            self.delay.delay_us(1);

            let _ = self.cs.set_high();

            // tSRW/tSRR (=20us) minus tSCLK-NCS
            self.delay.delay_us(19);

            Ok(buffer[1])
        }

        pub fn write_register(&mut self, reg: Register, byte: u8) -> Result<(), E> {
            let _ = self.cs.set_low();

            let buffer = [reg.addr() | 0x80, byte];
            self.spi.write(&buffer)?;

            // tSCLK-NCS for write operation
            self.delay.delay_us(20);

            let _ = self.cs.set_high();

            // tSWW/tSWR (=120us) minus tSCLK-NCS.
            // Could be shortened, but is looks like a safe lower bound
            self.delay.delay_us(100);

            Ok(())
        }

        /// Reads the ProductId register; should return `0x47`
        pub fn product_id(&mut self) -> Result<u8, E> {
            self.read_register(Register::ProductId)
        }

        ///
        pub fn upload_firmware(&mut self, mut itm: stm32f4::stm32f411::ITM) -> Result<(), E> {
            let stim = &mut itm.stim[0];
            // send the firmware to the chip, cf p.18 of the datasheet
            // Serial.println("Uploading firmware...");
            iprintln!(stim, "Uploading firmware...");

            //Write 0 to Rest_En bit of Config2 register to disable Rest mode.
            // adns_write_reg(Config2, 0x20);
            self.write_register(Register::Config2, 0x20)?;

            // write 0x1d in SROM_enable reg for initializing
            // adns_write_reg(SROM_Enable, 0x1d);
            self.write_register(Register::SROMEnable, 0x1d)?;

            // wait for more than one frame period
            // delay(10);
            // assume that the frame rate is as low as 100fps...
            // even if it should never be that low
            self.delay.delay_ms(10);

            // write 0x18 to SROM_enable to start SROM download
            // adns_write_reg(SROM_Enable, 0x18);
            self.write_register(Register::SROMEnable, 0x18)?;

            // write the SROM file (=firmware data)
            // adns_com_begin();
            let _ = self.cs.set_low();

            // write burst destination address
            self.spi
                .transfer(&mut [Register::SROMLoadBurst.addr() | 0x80])?;
            // delayMicroseconds(15);

            self.delay.delay_us(15);

            // send all bytes of the firmware
            // unsigned char c;
            // for(int i = 0; i < firmware_length; i++){
            //   c = (unsigned char)pgm_read_byte(firmware_data + i);
            //   SPI.transfer(c);
            //   delayMicroseconds(15);
            // }

            iprintln!(stim, "Begin transfer...");

            for i in FIRMWARE.iter() {
                self.spi.transfer(&mut [*i])?;
                self.delay.delay_us(15);
            }

            // Per: added this, seems adequate
            self.delay.delay_us(105);

            let _ = self.cs.set_high();

            //Read the SROM_ID register to verify the ID before any other register reads or writes.
            // adns_read_reg(SROM_ID);

            let srom_id = self.read_register(Register::SROMId)?;
            iprintln!(stim, "srom_id {}, 0x{:x}", srom_id, srom_id);

            //Write 0x00 to Config2 register for wired mouse or 0x20 for wireless mouse design.
            // adns_write_reg(Config2, 0x00);
            self.write_register(Register::Config2, 0x00)?;

            // set initial CPI resolution
            // adns_write_reg(Config1, 0x15);
            // not sure this is the RippleControl
            self.write_register(Register::RippleControl, 0x15)?;

            // adns_com_end();
            Ok(())
        }

        // /// Read multiple bytes starting from the `start_reg` register.
        // /// This function will attempt to fill the provided buffer.
        // fn read_many(&mut self, start_reg: Register, buffer: &mut [u8]) -> Result<(), E> {
        //     let _ = self.cs.set_low();
        //     buffer[0] = start_reg.addr() | MULTI | READ;
        //     self.spi.transfer(buffer)?;
        //     let _ = self.cs.set_high();

        //     Ok(())
        // }

        // /// Change configuration in register
        // ///
        // /// Helper function to update a particular part of a register without
        // /// affecting other parts of the register that might contain desired
        // /// configuration. This allows the `L3gd20` struct to be used like
        // /// a builder interface when configuring specific parameters.
        // fn change_config<B: BitValue>(&mut self, reg: Register, bits: B) -> Result<&mut Self, E> {
        //     // Create bit mask from width and shift of value
        //     let mask = B::mask() << B::shift();
        //     // Extract the value as u8
        //     let bits = (bits.value() << B::shift()) & mask;
        //     // Read current value of register
        //     let current = self.read_register(reg)?;
        //     // Use supplied mask so we don't affect more than necessary
        //     let masked = current & !mask;
        //     // Use `or` to apply the new value without affecting other parts
        //     let new_reg = masked | bits;
        //     self.write_register(reg, new_reg)?;
        //     Ok(self)
        // }
    }

    // const unsigned char firmware_data[] PROGMEM
    const FIRMWARE: [u8; 4094] = [
        0x01, 0xe8, 0xba, 0x26, 0x0b, 0xb2, 0xbe, 0xfe, 0x7e, 0x5f, 0x3c, 0xdb, 0x15, 0xa8, 0xb3,
        0xe4, 0x2b, 0xb5, 0xe8, 0x53, 0x07, 0x6d, 0x3b, 0xd1, 0x20, 0xc2, 0x06, 0x6f, 0x3d, 0xd9,
        0x11, 0xa0, 0xc2, 0xe7, 0x2d, 0xb9, 0xd1, 0x20, 0xa3, 0xa5, 0xc8, 0xf3, 0x64, 0x4a, 0xf7,
        0x4d, 0x18, 0x93, 0xa4, 0xca, 0xf7, 0x6c, 0x5a, 0x36, 0xee, 0x5e, 0x3e, 0xfe, 0x7e, 0x7e,
        0x5f, 0x1d, 0x99, 0xb0, 0xc3, 0xe5, 0x29, 0xd3, 0x03, 0x65, 0x48, 0x12, 0x87, 0x6d, 0x58,
        0x32, 0xe6, 0x2f, 0xdc, 0x3a, 0xf2, 0x4f, 0xfd, 0x59, 0x11, 0x81, 0x61, 0x21, 0xc0, 0x02,
        0x86, 0x8e, 0x7f, 0x5d, 0x38, 0xf2, 0x47, 0x0c, 0x7b, 0x55, 0x28, 0xb3, 0xe4, 0x4a, 0x16,
        0xab, 0xbf, 0xdd, 0x38, 0xf2, 0x66, 0x4e, 0xff, 0x5d, 0x19, 0x91, 0xa0, 0xa3, 0xa5, 0xc8,
        0x12, 0xa6, 0xaf, 0xdc, 0x3a, 0xd1, 0x41, 0x60, 0x75, 0x58, 0x24, 0x92, 0xd4, 0x72, 0x6c,
        0xe0, 0x2f, 0xfd, 0x23, 0x8d, 0x1c, 0x5b, 0xb2, 0x97, 0x36, 0x3d, 0x0b, 0xa2, 0x49, 0xb1,
        0x58, 0xf2, 0x1f, 0xc0, 0xcb, 0xf8, 0x41, 0x4f, 0xcd, 0x1e, 0x6b, 0x39, 0xa7, 0x2b, 0xe9,
        0x30, 0x16, 0x83, 0xd2, 0x0e, 0x47, 0x8f, 0xe3, 0xb1, 0xdf, 0xa2, 0x15, 0xdb, 0x5d, 0x30,
        0xc5, 0x1a, 0xab, 0x31, 0x99, 0xf3, 0xfa, 0xb2, 0x86, 0x69, 0xad, 0x7a, 0xe8, 0xa7, 0x18,
        0x6a, 0xcc, 0xc8, 0x65, 0x23, 0x87, 0xa8, 0x5f, 0xf5, 0x21, 0x59, 0x75, 0x09, 0x71, 0x45,
        0x55, 0x25, 0x4b, 0xda, 0xa1, 0xc3, 0xf7, 0x41, 0xab, 0x59, 0xd9, 0x74, 0x12, 0x55, 0x5f,
        0xbc, 0xaf, 0xd9, 0xfd, 0xb0, 0x1e, 0xa3, 0x0f, 0xff, 0xde, 0x11, 0x16, 0x6a, 0xae, 0x0e,
        0xe1, 0x5d, 0x3c, 0x10, 0x43, 0x9a, 0xa1, 0x0b, 0x24, 0x8f, 0x0d, 0x7f, 0x0b, 0x5e, 0x4c,
        0x42, 0xa4, 0x84, 0x2c, 0x40, 0xd0, 0x55, 0x39, 0xe6, 0x4b, 0xf8, 0x9b, 0x2f, 0xdc, 0x28,
        0xff, 0xfa, 0xb5, 0x85, 0x19, 0xe5, 0x28, 0xa1, 0x77, 0xaa, 0x73, 0xf3, 0x03, 0xc7, 0x62,
        0xa6, 0x91, 0x18, 0xc9, 0xb0, 0xcd, 0x05, 0xdc, 0xca, 0x81, 0x26, 0x1a, 0x47, 0x40, 0xda,
        0x36, 0x7d, 0x6a, 0x53, 0xc8, 0x5a, 0x77, 0x5d, 0x19, 0xa4, 0x1b, 0x23, 0x83, 0xd0, 0xb2,
        0xaa, 0x0e, 0xbf, 0x77, 0x4e, 0x3a, 0x3b, 0x59, 0x00, 0x31, 0x0d, 0x02, 0x1b, 0x88, 0x7a,
        0xd4, 0xbd, 0x9d, 0xcc, 0x58, 0x04, 0x69, 0xf6, 0x3b, 0xca, 0x42, 0xe2, 0xfd, 0xc3, 0x3d,
        0x39, 0xc5, 0xd0, 0x71, 0xe4, 0xc8, 0xb7, 0x3e, 0x3f, 0xc8, 0xe9, 0xca, 0xc9, 0x3f, 0x04,
        0x4e, 0x1b, 0x79, 0xca, 0xa5, 0x61, 0xc2, 0xed, 0x1d, 0xa6, 0xda, 0x5a, 0xe9, 0x7f, 0x65,
        0x8c, 0xbe, 0x12, 0x6e, 0xa4, 0x5b, 0x33, 0x2f, 0x84, 0x28, 0x9c, 0x1c, 0x88, 0x2d, 0xff,
        0x07, 0xbf, 0xa6, 0xd7, 0x5a, 0x88, 0x86, 0xb0, 0x3f, 0xf6, 0x31, 0x5b, 0x11, 0x6d, 0xf5,
        0x58, 0xeb, 0x58, 0x02, 0x9e, 0xb5, 0x9a, 0xb1, 0xff, 0x25, 0x9d, 0x8b, 0x4f, 0xb6, 0x0a,
        0xf9, 0xea, 0x3e, 0x3f, 0x21, 0x09, 0x65, 0x21, 0x22, 0xfe, 0x3d, 0x4e, 0x11, 0x5b, 0x9e,
        0x5a, 0x59, 0x8b, 0xdd, 0xd8, 0xce, 0xd6, 0xd9, 0x59, 0xd2, 0x1e, 0xfd, 0xef, 0x0d, 0x1b,
        0xd9, 0x61, 0x7f, 0xd7, 0x2d, 0xad, 0x62, 0x09, 0xe5, 0x22, 0x63, 0xea, 0xc7, 0x31, 0xd9,
        0xa1, 0x38, 0x80, 0x5c, 0xa7, 0x32, 0x82, 0xec, 0x1b, 0xa2, 0x49, 0x5a, 0x06, 0xd2, 0x7c,
        0xc9, 0x96, 0x57, 0xbb, 0x17, 0x75, 0xfc, 0x7a, 0x8f, 0x0d, 0x77, 0xb5, 0x7a, 0x8e, 0x3e,
        0xf4, 0xba, 0x2f, 0x69, 0x13, 0x26, 0xd6, 0xd9, 0x21, 0x60, 0x2f, 0x21, 0x3e, 0x87, 0xee,
        0xfd, 0x87, 0x16, 0x0d, 0xc8, 0x08, 0x00, 0x25, 0x71, 0xac, 0x2c, 0x03, 0x2a, 0x37, 0x2d,
        0xb3, 0x34, 0x09, 0x91, 0xe3, 0x06, 0x2c, 0x38, 0x37, 0x95, 0x3b, 0x17, 0x7a, 0xaf, 0xac,
        0x99, 0x55, 0xab, 0x41, 0x39, 0x5f, 0x8e, 0xa6, 0x43, 0x80, 0x03, 0x88, 0x6f, 0x7d, 0xbd,
        0x5a, 0xb4, 0x2b, 0x32, 0x23, 0x5a, 0xa9, 0x31, 0x32, 0x39, 0x4c, 0x5b, 0xf4, 0x6b, 0xaf,
        0x66, 0x6f, 0x3c, 0x8e, 0x2d, 0x82, 0x97, 0x9f, 0x4a, 0x01, 0xdc, 0x99, 0x98, 0x00, 0xec,
        0x38, 0x7a, 0x79, 0x70, 0xa6, 0x85, 0xd6, 0x21, 0x63, 0x0d, 0x45, 0x9a, 0x2e, 0x5e, 0xa7,
        0xb1, 0xea, 0x66, 0x6a, 0xbc, 0x62, 0x2d, 0x7b, 0x7d, 0x85, 0xea, 0x95, 0x2f, 0xc0, 0xe8,
        0x6f, 0x35, 0xa0, 0x3a, 0x02, 0x25, 0xbc, 0xb2, 0x5f, 0x5c, 0x43, 0x96, 0xcc, 0x26, 0xd2,
        0x16, 0xb4, 0x96, 0x73, 0xd7, 0x13, 0xc7, 0xae, 0x53, 0x15, 0x31, 0x89, 0x68, 0x66, 0x6d,
        0x2c, 0x92, 0x1f, 0xcc, 0x5b, 0xa7, 0x8f, 0x5d, 0xbb, 0xc9, 0xdb, 0xe8, 0x3b, 0x9d, 0x61,
        0x74, 0x8b, 0x05, 0xa1, 0x58, 0x52, 0x68, 0xee, 0x3d, 0x39, 0x79, 0xa0, 0x9b, 0xdd, 0xe1,
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}