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Created with Raphaël 2.2.021Jan1716151123Dec212018921Nov21Sep5Aug20Jul76430Jun2816151413128530May231510118730Apr2011812Mar1110874228Feb22Jan31Dec2119Nov715Oct764327Sepitm packaging according to CMSISitmitmAuto merge of #80 - japaric:send, r=japaricv0.4.2 masterv0.4.2 masterimpl Send for all the peripheralsv0.4.1v0.4.1v0.4.1Merge pull request #78 from japaric/reexportreexport Peripherals at the root for convenienceupdate changelogv0.4.0v0.4.0Auto merge of #77 - japaric:v4, r=japaricv0.4.0Auto merge of #76 - japaric:thumbv6m, r=japaricfixes and make sure the whole documentation is visible on docs.rshide ARMv7-M only peripherals on thumbv6m-none-eabiAuto merge of #75 - japaric:syst, r=japaricbetter document the SYST APIAuto merge of #70 - japaric:safe-static-mut, r=japaricaddress review commentsAuto merge of #69 - japaric:revise-api, r=japaricfix thumbv6m buildaddress review commentsAuto merge of #72 - japaric:cm7-r0p1, r=japariccache the Xargo directoryAuto merge of #73 - japaric:itm, r=japaricmake `Stim::write_*` methods take `&mut self` instead of `&self`add a Cargo feature, cm7-r0p1, to fix a Cortex-M7 BASEPRI erratumrevise peripheral APIAuto merge of #71 - japaric:unimplemented-asm, r=japaricinline(always) -> inlinemap asm! ops to unimplemented! on non ARM targetssafe `&'static mut` references through a runtime checked macrodocument `set_fpu_access_mode` footgunAuto merge of #62 - hannobraun:update-nvic, r=japaricFix `IPR` representation on ARMv6-MMake all available NVIC registers accessibleAuto merge of #66 - japaric:unhide-steal, r=japaricdocs: unhide `Peripherals::steal` methodAuto merge of #65 - japaric:singletons, r=japaricfix travisfix testss/all/take/g s/_all/steal/gturn peripherals into scoped singletons
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