impl Send for all the peripherals

CHANGELOG.md

@@ -7,6 +7,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+## [v0.4.2] - 2018-01-17
+
+### Fixed
+
+- Added a missing `Send` implementation to all the peripherals.
+
 ## [v0.4.1] - 2018-01-16
 
 ### Changed
@@ -385,7 +391,8 @@ fn main() {
 - Functions to get the vector table
 - Wrappers over miscellaneous instructions like `bkpt`
 
-[Unreleased]: https://github.com/japaric/cortex-m/compare/v0.4.1...HEAD
+[Unreleased]: https://github.com/japaric/cortex-m/compare/v0.4.2...HEAD
+[v0.4.2]: https://github.com/japaric/cortex-m/compare/v0.4.1...v0.4.2
 [v0.4.1]: https://github.com/japaric/cortex-m/compare/v0.4.0...v0.4.1
 [v0.4.0]: https://github.com/japaric/cortex-m/compare/v0.3.1...v0.4.0
 [v0.3.1]: https://github.com/japaric/cortex-m/compare/v0.3.0...v0.3.1

Cargo.toml

@@ -7,7 +7,7 @@ keywords = ["arm", "cortex-m", "register", "peripheral"]
 license = "MIT OR Apache-2.0"
 name = "cortex-m"
 repository = "https://github.com/japaric/cortex-m"
-version = "0.4.1"
+version = "0.4.2"
 
 [dependencies]
 aligned = "0.1.1"

src/peripheral/mod.rs

@@ -220,6 +220,9 @@ pub struct CBP {
     _marker: PhantomData<*const ()>,
 }
 
+#[cfg(any(armv7m, target_arch = "x86_64"))]
+unsafe impl Send for CBP {}
+
 #[cfg(any(armv7m, target_arch = "x86_64"))]
 impl CBP {
     pub(crate) unsafe fn new() -> Self {
@@ -234,9 +237,6 @@ impl CBP {
     }
 }
 
-#[cfg(any(armv7m, target_arch = "x86_64"))]
-unsafe impl Send for CBP {}
-
 #[cfg(any(armv7m, target_arch = "x86_64"))]
 impl ops::Deref for CBP {
     type Target = self::cbp::RegisterBlock;
@@ -251,6 +251,8 @@ pub struct CPUID {
     _marker: PhantomData<*const ()>,
 }
 
+unsafe impl Send for CPUID {}
+
 impl CPUID {
     /// Returns a pointer to the register block
     pub fn ptr() -> *const self::cpuid::RegisterBlock {
@@ -271,6 +273,8 @@ pub struct DCB {
     _marker: PhantomData<*const ()>,
 }
 
+unsafe impl Send for DCB {}
+
 impl DCB {
     /// Returns a pointer to the register block
     pub fn ptr() -> *const dcb::RegisterBlock {
@@ -291,6 +295,8 @@ pub struct DWT {
     _marker: PhantomData<*const ()>,
 }
 
+unsafe impl Send for DWT {}
+
 impl DWT {
     /// Returns a pointer to the register block
     pub fn ptr() -> *const dwt::RegisterBlock {
@@ -314,6 +320,9 @@ pub struct FPB {
     _marker: PhantomData<*const ()>,
 }
 
+#[cfg(any(armv7m, target_arch = "x86_64"))]
+unsafe impl Send for FPB {}
+
 #[cfg(any(armv7m, target_arch = "x86_64"))]
 impl FPB {
     /// Returns a pointer to the register block
@@ -339,6 +348,9 @@ pub struct FPU {
     _marker: PhantomData<*const ()>,
 }
 
+#[cfg(any(has_fpu, target_arch = "x86_64"))]
+unsafe impl Send for FPU {}
+
 #[cfg(any(has_fpu, target_arch = "x86_64"))]
 impl FPU {
     /// Returns a pointer to the register block
@@ -364,6 +376,9 @@ pub struct ITM {
     _marker: PhantomData<*const ()>,
 }
 
+#[cfg(any(armv7m, target_arch = "x86_64"))]
+unsafe impl Send for ITM {}
+
 #[cfg(any(armv7m, target_arch = "x86_64"))]
 impl ITM {
     /// Returns a pointer to the register block
@@ -393,6 +408,8 @@ pub struct MPU {
     _marker: PhantomData<*const ()>,
 }
 
+unsafe impl Send for MPU {}
+
 impl MPU {
     /// Returns a pointer to the register block
     pub fn ptr() -> *const mpu::RegisterBlock {
@@ -413,6 +430,8 @@ pub struct NVIC {
     _marker: PhantomData<*const ()>,
 }
 
+unsafe impl Send for NVIC {}
+
 impl NVIC {
     /// Returns a pointer to the register block
     pub fn ptr() -> *const nvic::RegisterBlock {
@@ -433,6 +452,8 @@ pub struct SCB {
     _marker: PhantomData<*const ()>,
 }
 
+unsafe impl Send for SCB {}
+
 impl SCB {
     /// Returns a pointer to the register block
     pub fn ptr() -> *const scb::RegisterBlock {
@@ -453,6 +474,8 @@ pub struct SYST {
     _marker: PhantomData<*const ()>,
 }
 
+unsafe impl Send for SYST {}
+
 impl SYST {
     /// Returns a pointer to the register block
     pub fn ptr() -> *const syst::RegisterBlock {
@@ -476,6 +499,9 @@ pub struct TPIU {
     _marker: PhantomData<*const ()>,
 }
 
+#[cfg(any(armv7m, target_arch = "x86_64"))]
+unsafe impl Send for TPIU {}
+
 #[cfg(any(armv7m, target_arch = "x86_64"))]
 impl TPIU {
     /// Returns a pointer to the register block