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Commit d247069d authored by Per's avatar Per
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simple adc example

parent 8716f3f4
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......@@ -184,6 +184,34 @@
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "adc (debug)",
"preLaunchTask": "cargo build --example adc",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/adc",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
......
......@@ -3,6 +3,18 @@
// for the documentation about the tasks.json format
"version": "2.0.0",
"tasks": [
{
"type": "shell",
"label": "cargo build --example adc",
"command": "cargo build --example adc --features \"hal\"",
"problemMatcher": [
"$rustc"
],
"group": {
"kind": "build",
"isDefault": true
}
},
{
"type": "shell",
"label": "cargo build --examples",
......
//! Serial adc
//!
//! Connect using e.g., `moserial` to `/dev/ttyACM0`
//! 115200 8N1
//!
//! The MCU will echo incoming data and send a trace over ITM.
//! Notice, as the hardware has a single byte buffer only, the input
//! buffer may overflow.
// #![deny(unsafe_code)]
// #![deny(warnings)]
#![no_main]
#![no_std]
extern crate panic_halt;
use cortex_m_rt::entry;
use nb::block;
extern crate stm32f4xx_hal as hal;
use crate::hal::prelude::*;
use crate::hal::serial::{config::Config, Serial};
use cortex_m::iprintln;
#[entry]
fn main() -> ! {
let mut c = hal::stm32::CorePeripherals::take().unwrap();
let stim = &mut c.ITM.stim[0];
iprintln!(stim, "adc");
let p = hal::stm32::Peripherals::take().unwrap();
// let mut flash = p.FLASH.constrain();
// enable clock
p.RCC.apb2enr.modify(|_, w| w.adc1en().set_bit());
p.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit());
p.GPIOA.moder.modify(|_, w| w.moder0().analog());
// disable and setup
p.ADC1.cr2.modify(|_, w| {
w.adon().clear_bit().align().clear_bit().cont().clear_bit()
});
// enable
p.ADC1.cr2.modify(|_, w| w.adon().set_bit());
// iprintln!(stim, "ADC cr2 {:?}", p.ADC1.cr2.read().adon());
// broken, but likely works for channel 0
p.ADC1.smpr2.modify(|_, w| w.smpx_x().cycles480());
// start conversion
p.ADC1
.cr2
.modify(|_, w| w.swstart().set_bit().eocs().set_bit());
loop {
p.ADC1.cr2.modify(|_, w| w.swstart().set_bit());
while p.ADC1.sr.read().eoc().bit_is_clear() {}
let value = p.ADC1.dr.read().bits();
p.ADC1.sr.modify(|_, w| w.eoc().clear_bit());
iprintln!(stim, "val: {:?}", value);
}
let rcc = p.RCC.constrain();
let gpioa = p.GPIOA.split();
// let clocks = rcc.cfgr.freeze(&mut flash.acr);
let clocks = rcc.cfgr.freeze();
// let _clocks = rcc.cfgr.freeze();
let tx = gpioa.pa2.into_alternate_af7();
let rx = gpioa.pa3.into_alternate_af7();
let serial = Serial::usart2(
p.USART2,
(tx, rx),
Config::default().baudrate(115_200.bps()),
clocks,
)
.unwrap();
let a = use_stack();
unsafe {
core::ptr::read_volatile(&a);
}
// Separate out the sender and receiver of the serial port
let (mut tx, mut rx) = serial.split();
loop {
match block!(rx.read()) {
Ok(byte) => {
// iprintln!(stim, "Ok {:?}", byte);
let _ = tx.write(byte);
}
Err(err) => {
// iprintln!(stim, "Error {:?}", err);
}
}
}
}
#[inline(never)]
fn use_stack() -> u32 {
// let a = [0u8; 42];
// unsafe { core::ptr::read_volatile(&a); }
let mut a = 0;
unsafe {
core::ptr::read_volatile(&a);
}
a
}
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