bare2/3

.vscode/launch.json

@@ -36,7 +36,7 @@
             "request": "launch",
             "servertype": "openocd",
             "name": "itm internal (debug)",
-            "preLaunchTask": "cargo build --examples",
+            "preLaunchTask": "cargo build --example",
             "executable": "./target/thumbv7em-none-eabihf/debug/examples/${fileBasenameNoExtension}",
             "configFiles": [
                 "interface/stlink.cfg",
@@ -72,7 +72,7 @@
             "request": "launch",
             "servertype": "openocd",
             "name": "itm fifo (debug)",
-            "preLaunchTask": "cargo build --examples",
+            "preLaunchTask": "cargo build --example",
             "executable": "./target/thumbv7em-none-eabihf/debug/examples/${fileBasenameNoExtension}",
             "configFiles": [
                 "interface/stlink.cfg",
@@ -97,7 +97,7 @@
             "request": "launch",
             "servertype": "openocd",
             "name": "itm fifo (release)",
-            "preLaunchTask": "cargo build --examples --release",
+            "preLaunchTask": "cargo build --example --release",
             "executable": "./target/thumbv7em-none-eabihf/release/examples/${fileBasenameNoExtension}",
             "configFiles": [
                 "interface/stlink.cfg",
@@ -122,7 +122,7 @@
             "request": "launch",
             "servertype": "openocd",
             "name": "itm fifo 64MHz (release)",
-            "preLaunchTask": "cargo build --examples --release",
+            "preLaunchTask": "cargo build --example --release",
             "executable": "./target/thumbv7em-none-eabihf/release/examples/${fileBasenameNoExtension}",
             "configFiles": [
                 "interface/stlink.cfg",

.vscode/tasks.json

 {
+    // See https://go.microsoft.com/fwlink/?LinkId=733558
+    // for the documentation about the tasks.json format
+    "version": "2.0.0",
     "tasks": [
         {
             "type": "shell",
@@ -26,8 +29,8 @@
         },
         {
             "type": "shell",
-            "label": "cargo build --examples",
-            "command": "cargo build --examples",
+            "label": "cargo build --example",
+            "command": "cargo build --example ${fileBasenameNoExtension}",
             "group": {
                 "kind": "build",
                 "isDefault": true
@@ -38,8 +41,8 @@
         },
         {
             "type": "shell",
-            "label": "cargo build --examples --release",
-            "command": "cargo build --examples --release",
+            "label": "cargo build --example --release",
+            "command": "cargo build --example ${fileBasenameNoExtension} --release",
             "group": {
                 "kind": "build",
                 "isDefault": true

Cargo.toml

@@ -11,11 +11,11 @@ edition = "2018"
 
 [dependencies]
 panic-halt              = "0.2"
-panic-semihosting       = "0.5"
+# panic-semihosting       = "0.5" # comment out for `cargo doc`
+# panic-itm               = "0.4.1" # comment out for `cargo doc`
 cortex-m-semihosting    = "0.3.5"
 aligned                 = "0.3.2"
 ufmt                    = "0.1.0"
-panic-itm               = "0.4.1"
 nb                      = "0.1.2"
 
 [dependencies.cortex-m]

examples/bare2.rs

+//! bare2.rs
+//!
+//! Measuring execution time
+//!
+//! What it covers
+//! - Generating documentation
+//! - Using core peripherals
+//! - Measuring time using the DWT
+//! - ITM tracing
+//!
+
+#![no_main]
+#![no_std]
+
+extern crate panic_halt;
+
+use cortex_m::{iprintln, peripheral::DWT, Peripherals};
+use cortex_m_rt::entry;
+
+// burns CPU cycles by just looping `i` times
+#[inline(never)]
+fn wait(i: u32) {
+    for _ in 0..i {
+        // no operation (ensured not optimized out)
+        cortex_m::asm::nop();
+    }
+}
+
+#[entry]
+fn main() -> ! {
+    let mut p = Peripherals::take().unwrap();
+    let stim = &mut p.ITM.stim[0];
+    let mut dwt = p.DWT;
+
+    iprintln!(stim, "bare2");
+
+    dwt.enable_cycle_counter();
+
+    // Reading the cycle counter can be done without `owning` access
+    // the DWT (since it has no side effetc).
+    //
+    // Look in the docs:
+    // pub fn enable_cycle_counter(&mut self)
+    // pub fn get_cycle_count() -> u32
+    //
+    // Notice the difference in the function signature!
+
+    let start = DWT::get_cycle_count();
+    wait(1_000_000);
+    let end = DWT::get_cycle_count();
+
+    // notice all printing outside of the section to measure!
+    iprintln!(stim, "Start {:?}", start);
+    iprintln!(stim, "End {:?}", end);
+    iprintln!(stim, "Diff {:?}", end - start);
+
+    loop {}
+}
+
+// 0. Setup
+//    > cargo doc --open
+//
+//    This will document your crate, and open the docs in your browser.
+//    If it does not auto-open, then copy paste the path in your browser.
+//    (Notice, it will try to document all dependencies, you may have only one
+//    one panic handler, so comment out all but one in `Cargo.toml`.)
+//
+//    In the docs, search (`S`) for DWT, and click `cortex_m::peripheral::DWT`.
+//    Read the API docs.
+//
+// 1. Build and run the application (debug build).
+//    Setup ITM tracing (see `bare1.rs`) and `openocd` (if not using vscode).
+//
+//    > cargo run --example bare2
+//    (or use the vscode build task)
+//
+//    What is the output in the ITM console?
+//
+//    ** your answer here **
+//
+//    Rebuild and run in release mode
+//
+//    > cargo build --example bare2 --release
+//
+//    ** your answer here **
+//
+//    Compute the ratio between debug/release optimized code
+//    (the speedup).
+//
+//    ** your answer here **
+//
+// commit your answers (bare2_1)
+//
+// 3. *Optional
+//    Inspect the generated binaries, and try stepping through the code
+//    for both debug and release binaries. How do they differ?
+//
+//    ** your answer here **
+//
+//    commit your answers (bare2_2)

examples/bare3.rs

+//! bare3.rs
+//!
+//! String types in Rust
+//!
+//! What it covers:
+//! - Types, str, arrays ([u8;uszie]), slices (&[u8])
+//! - Iteration, copy
+//! - Semihosting (tracing)
+
+#![no_main]
+#![no_std]
+
+extern crate panic_halt;
+
+use cortex_m_rt::entry;
+use cortex_m_semihosting::{hprint, hprintln};
+
+#[entry]
+fn main() -> ! {
+    hprintln!("bare3").unwrap();
+    let s = "ABCD";
+    let bs = s.as_bytes();
+
+    hprintln!("s = {}", s).unwrap();
+    hprintln!("bs = {:?}", bs).unwrap();
+
+    hprintln!("iterate over slice").unwrap();
+    for c in bs {
+        hprint!("{},", c).unwrap();
+    }
+
+    hprintln!("iterate iterate using (raw) indexing").unwrap();
+    for i in 0..s.len() {
+        hprintln!("{},", bs[i]).unwrap();
+    }
+
+    hprintln!("").unwrap();
+
+    let a = [65u8; 4];
+    // let mut a = [0u8; 4];
+
+    hprintln!("").unwrap();
+    hprintln!("a = {}", core::str::from_utf8(&a).unwrap()).unwrap();
+
+    loop {
+        continue;
+    }
+}
+
+// 0. Build and run the application (debug build).
+//
+//    > cargo run --example bare3
+//    (or use the vscode build task)
+//
+// 1. What is the output in the `openocd` (Adapter Output) console?
+//
+//    ** your answer here **
+//
+//    What is the type of `s`?
+//
+//    ** your answer here **
+//
+//    What is the type of `bs`?
+//
+//    ** your answer here **
+//
+//    What is the type of `c`?
+//
+//    ** your answer here **
+//
+//    What is the type of `a`?
+//
+//    ** your answer here **
+//
+//    What is the type of `i`?
+//
+//    ** your answer here **
+//
+//    Commit your answers (bare3_1)
+//
+// 2. Make types of `s`, `bs`, `c`, `a`, `i` explicit.
+//
+//    Commit your answers (bare3_2)
+//
+// 3. Uncomment line `let mut a = [0u8; 4];
+//`
+//    Run the program, what happens and why?
+//
+//    ** your answer here **
+//
+//    Commit your answers (bare3_3)
+//
+// 4. Alter the program so that the data from `bs` is copied byte by byte into `a`.
+//
+//    Test that it works as intended.
+//
+//    Commit your answers (bare3_4)
+//
+// 5. Look for a way to make this copy done without a loop.
+//    https://doc.rust-lang.org/std/primitive.slice.html
+//
+//    Implement and test your solution.
+//
+//    Commit your answers (bare3_5)