3 files + 102 − 13 Side-by-side Compare changes Side-by-side Inline Show whitespace changes Files 3 examples/rtic_blinky.rs +1 −1 Original line number Original line Diff line number Diff line Loading @@ -40,7 +40,7 @@ const APP: () = { let now = cx.start; // the start time of the system let now = cx.start; // the start time of the system // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future cx.schedule.toggle(now + 8_000_000.cycles()).unwrap(); cx.schedule.toggle(now +16_000_000.cycles()).unwrap(); // power on GPIOA, RM0368 6.3.11 // power on GPIOA, RM0368 6.3.11 device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); Loading examples/rtt-pwm.rs +1 −1 Original line number Original line Diff line number Diff line //! cargo run --examples rtt-pwm //! cargo run --example rtt-pwm #![deny(unsafe_code)] #![deny(unsafe_code)] #![deny(warnings)] #![deny(warnings)] Loading src/main.rs +100 −11 Original line number Original line Diff line number Diff line #![deny(unsafe_code)] #![deny(warnings)] #![no_std] #![no_std] #![no_main] #![no_main] // pick a panicking behavior // pick a panicking behavior// use panic_abort as _; // requires nightly use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics // use panic_abort as _; // requires nightly // use panic_itm as _; // logs messages over ITM; requires ITM support // use panic_itm as _; // logs messages over ITM; requires ITM support // use panic_semihosting as _; // logs messages to the host stderr; requires a debugger // use panic_semihosting as _; // logs messages to the host stderr; requires a debugger use cortex_m::asm; use cortex_m_rt::entry; #[entry] use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics fn main() -> ! { use rtt_target::{rprintln, rtt_init_print}; asm::nop(); // To not have main optimize to abort in release mode, remove when you add code use cortex_m::peripheral::DWT; use stm32f4xx_hal::stm32; //use cortex_m::asm; //use cortex_m_rt::entry; use rtic::cyccnt::{Instant, U32Ext as _}; #[rtic::app(device = stm32f4xx_hal::stm32, monotonic = rtic::cyccnt::CYCCNT, peripherals = true)] const APP: () = { struct Resources { // late resources GPIOA: stm32::GPIOA, } #[init(schedule = [toggle])] fn init(cx: init::Context) -> init::LateResources { rtt_init_print!(); rprintln!("init"); for i in 0..11 { rprintln!("RTIC Says Hello, world {}!!", i); } let mut core = cx.core; let device = cx.device; // Initialize (enable) the monotonic timer (CYCCNT) core.DCB.enable_trace(); // required on Cortex-M7 devices that software lock the DWT (e.g. STM32F7) DWT::unlock(); core.DWT.enable_cycle_counter(); // semantically, the monotonic timer is frozen at time "zero" during `init` // NOTE do *not* call `Instant::now` in this context; it will return a nonsense value let now = cx.start; // the start time of the system // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future cx.schedule.toggle(now + 8_000_000.cycles()).unwrap(); // power on GPIOA, RM0368 6.3.11 device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); // configure PA5 as output, RM0368 8.4.1 device.GPIOA.moder.modify(|_, w| w.moder5().bits(1)); // pass on late resources init::LateResources { GPIOA: device.GPIOA, } } #[idle] fn idle(_cx: idle::Context) -> ! { rprintln!("lets get lazy"); loop { loop { // your code goes here continue; } } } } #[task(resources = [GPIOA], schedule = [toggle])] fn toggle(cx: toggle::Context) { static mut TOGGLE: bool = false; rprintln!("toggle @ {:?}", Instant::now()); if *TOGGLE { cx.resources.GPIOA.bsrr.write(|w| w.bs5().set_bit()); } else { cx.resources.GPIOA.bsrr.write(|w| w.br5().set_bit()); } <<<<<<< HEAD //cx.resources.GPIOC.PullDown; ======= >>>>>>> 80d2d39 (changed main) *TOGGLE = !*TOGGLE; cx.schedule .toggle(cx.scheduled + 16_000_000.cycles()) .unwrap(); <<<<<<< HEAD ======= >>>>>>> 80d2d39 (changed main) } extern "C" { fn EXTI0(); } };
examples/rtic_blinky.rs +1 −1 Original line number Original line Diff line number Diff line Loading @@ -40,7 +40,7 @@ const APP: () = { let now = cx.start; // the start time of the system let now = cx.start; // the start time of the system // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future cx.schedule.toggle(now + 8_000_000.cycles()).unwrap(); cx.schedule.toggle(now +16_000_000.cycles()).unwrap(); // power on GPIOA, RM0368 6.3.11 // power on GPIOA, RM0368 6.3.11 device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); Loading
examples/rtt-pwm.rs +1 −1 Original line number Original line Diff line number Diff line //! cargo run --examples rtt-pwm //! cargo run --example rtt-pwm #![deny(unsafe_code)] #![deny(unsafe_code)] #![deny(warnings)] #![deny(warnings)] Loading
src/main.rs +100 −11 Original line number Original line Diff line number Diff line #![deny(unsafe_code)] #![deny(warnings)] #![no_std] #![no_std] #![no_main] #![no_main] // pick a panicking behavior // pick a panicking behavior// use panic_abort as _; // requires nightly use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics // use panic_abort as _; // requires nightly // use panic_itm as _; // logs messages over ITM; requires ITM support // use panic_itm as _; // logs messages over ITM; requires ITM support // use panic_semihosting as _; // logs messages to the host stderr; requires a debugger // use panic_semihosting as _; // logs messages to the host stderr; requires a debugger use cortex_m::asm; use cortex_m_rt::entry; #[entry] use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics fn main() -> ! { use rtt_target::{rprintln, rtt_init_print}; asm::nop(); // To not have main optimize to abort in release mode, remove when you add code use cortex_m::peripheral::DWT; use stm32f4xx_hal::stm32; //use cortex_m::asm; //use cortex_m_rt::entry; use rtic::cyccnt::{Instant, U32Ext as _}; #[rtic::app(device = stm32f4xx_hal::stm32, monotonic = rtic::cyccnt::CYCCNT, peripherals = true)] const APP: () = { struct Resources { // late resources GPIOA: stm32::GPIOA, } #[init(schedule = [toggle])] fn init(cx: init::Context) -> init::LateResources { rtt_init_print!(); rprintln!("init"); for i in 0..11 { rprintln!("RTIC Says Hello, world {}!!", i); } let mut core = cx.core; let device = cx.device; // Initialize (enable) the monotonic timer (CYCCNT) core.DCB.enable_trace(); // required on Cortex-M7 devices that software lock the DWT (e.g. STM32F7) DWT::unlock(); core.DWT.enable_cycle_counter(); // semantically, the monotonic timer is frozen at time "zero" during `init` // NOTE do *not* call `Instant::now` in this context; it will return a nonsense value let now = cx.start; // the start time of the system // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future cx.schedule.toggle(now + 8_000_000.cycles()).unwrap(); // power on GPIOA, RM0368 6.3.11 device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); // configure PA5 as output, RM0368 8.4.1 device.GPIOA.moder.modify(|_, w| w.moder5().bits(1)); // pass on late resources init::LateResources { GPIOA: device.GPIOA, } } #[idle] fn idle(_cx: idle::Context) -> ! { rprintln!("lets get lazy"); loop { loop { // your code goes here continue; } } } } #[task(resources = [GPIOA], schedule = [toggle])] fn toggle(cx: toggle::Context) { static mut TOGGLE: bool = false; rprintln!("toggle @ {:?}", Instant::now()); if *TOGGLE { cx.resources.GPIOA.bsrr.write(|w| w.bs5().set_bit()); } else { cx.resources.GPIOA.bsrr.write(|w| w.br5().set_bit()); } <<<<<<< HEAD //cx.resources.GPIOC.PullDown; ======= >>>>>>> 80d2d39 (changed main) *TOGGLE = !*TOGGLE; cx.schedule .toggle(cx.scheduled + 16_000_000.cycles()) .unwrap(); <<<<<<< HEAD ======= >>>>>>> 80d2d39 (changed main) } extern "C" { fn EXTI0(); } };