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Jonas Jacobsson
e7020e_2021
Commits
c32b0e16
Commit
c32b0e16
authored
4 years ago
by
Jonas Jacobsson
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examples/rtic_bare5.txt
+24
-0
24 additions, 0 deletions
examples/rtic_bare5.txt
src/main.rs
+11
-102
11 additions, 102 deletions
src/main.rs
with
35 additions
and
102 deletions
examples/rtic_bare5.txt
0 → 100644
+
24
−
0
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c32b0e16
fn test_modify() {
let t: VolatileCell<u32> = VolatileCell {
value: core::cell::UnsafeCell::new(0),
};
t.write(0);
assert!(t.read() == 0);
t.modify(3, 3, 0b10101);
// 10101
// ..0111000
// ---------
// 000101000
assert!(t.read() == 0b101 << 3);
t.modify(4, 3, 0b10001);
// 000101000
// 111
// 001
// 000011000
assert!(t.read() == 0b011 << 3);
//
// add more tests here if you like
}
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src/main.rs
+
11
−
102
View file @
c32b0e16
#![deny(unsafe_code)]
#![deny(warnings)]
#![no_std]
#![no_main]
// pick a panicking behavior// use panic_abort as _; // requires nightly
// pick a panicking behavior
use
panic_halt
as
_
;
// you can put a breakpoint on `rust_begin_unwind` to catch panics
// use panic_abort as _; // requires nightly
// use panic_itm as _; // logs messages over ITM; requires ITM support
// use panic_semihosting as _; // logs messages to the host stderr; requires a debugger
use
cortex_m
::
asm
;
use
cortex_m_rt
::
entry
;
use
panic_halt
as
_
;
// you can put a breakpoint on `rust_begin_unwind` to catch panics
use
rtt_target
::{
rprintln
,
rtt_init_print
};
use
cortex_m
::
peripheral
::
DWT
;
use
stm32f4xx_hal
::
stm32
;
//use cortex_m::asm;
//use cortex_m_rt::entry;
use
rtic
::
cyccnt
::{
Instant
,
U32Ext
as
_
};
#[rtic::app(device
=
stm32f4xx_hal::stm32,
monotonic
=
rtic::cyccnt::CYCCNT,
peripherals
=
true
)]
const
APP
:
()
=
{
struct
Resources
{
// late resources
GPIOA
:
stm32
::
GPIOA
,
GPIOC
:
stm32
::
GPIOC
,
//button: <stm32::GPIOC as int>::PC13,
}
#[init(schedule
=
[
toggle]
)]
fn
init
(
cx
:
init
::
Context
)
->
init
::
LateResources
{
rtt_init_print!
();
rprintln!
(
"init"
);
for
i
in
0
..
11
{
rprintln!
(
"RTIC Says Hello, world {}!!"
,
i
);
}
let
mut
core
=
cx
.core
;
let
device
=
cx
.device
;
// Initialize (enable) the monotonic timer (CYCCNT)
core
.DCB
.enable_trace
();
// required on Cortex-M7 devices that software lock the DWT (e.g. STM32F7)
DWT
::
unlock
();
core
.DWT
.enable_cycle_counter
();
#[entry]
fn
main
()
->
!
{
asm
::
nop
();
// To not have main optimize to abort in release mode, remove when you add code
// semantically, the monotonic timer is frozen at time "zero" during `init`
// NOTE do *not* call `Instant::now` in this context; it will return a nonsense value
let
now
=
cx
.start
;
// the start time of the system
// Schedule `toggle` to run 8e6 cycles (clock cycles) in the future
cx
.schedule
.toggle
(
now
+
8_000_000
.cycles
())
.unwrap
();
// power on GPIOA, RM0368 6.3.11
device
.RCC.ahb1enr
.modify
(|
_
,
w
|
w
.gpioaen
()
.set_bit
());
// configure PA5 as output, RM0368 8.4.1
device
.GPIOA.moder
.modify
(|
_
,
w
|
w
.moder5
()
.bits
(
1
));
// Test button thingy. Think I put PC13 to input
device
.GPIOC.moder
.modify
(|
_
,
w
|
w
.moder13
()
.bits
(
0
));
// device.GPIOC.pupdr.modify(|_, w| w.pupdr13().bits(0));
// pass on late resources
init
::
LateResources
{
GPIOA
:
device
.GPIOA
,
GPIOC
:
device
.GPIOC
,
//button: device.button,
}
loop
{
// your code goes here
}
#[idle]
fn
idle
(
_cx
:
idle
::
Context
)
->
!
{
rprintln!
(
"lets get lazy"
);
loop
{
continue
;
}
}
#[task(resources
=
[
GPIOA,GPIOC]
,
schedule
=
[
toggle
])]
fn
toggle
(
cx
:
toggle
::
Context
)
{
static
mut
TOGGLE
:
bool
=
false
;
rprintln!
(
"toggle @ {:?}"
,
Instant
::
now
());
if
*
TOGGLE
{
cx
.resources.GPIOA.bsrr
.write
(|
w
|
w
.bs5
()
.set_bit
());
}
else
{
cx
.resources.GPIOA.bsrr
.write
(|
w
|
w
.br5
()
.set_bit
());
}
//cx.resources.GPIOC.PullDown;
*
TOGGLE
=
!*
TOGGLE
;
cx
.schedule
.toggle
(
cx
.scheduled
+
16_000_000
.cycles
())
.unwrap
();
}
extern
"C"
{
fn
EXTI0
();
}
};
}
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