Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
R
rtic_f4xx_nucleo
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
GitLab community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Edvin Åkerfeldt
rtic_f4xx_nucleo
Commits
d7a327d2
Commit
d7a327d2
authored
Dec 3, 2020
by
Edvin Åkerfeldt
Browse files
Options
Downloads
Patches
Plain Diff
timing_resources, forgot to add file in
0e63e8b9
parent
0e63e8b9
Branches
Branches containing commit
No related tags found
No related merge requests found
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
examples/timing_resources.rs
+24
-0
24 additions, 0 deletions
examples/timing_resources.rs
with
24 additions
and
0 deletions
examples/timing_resources.rs
+
24
−
0
View file @
d7a327d2
...
@@ -111,10 +111,27 @@ Tl;dr,
...
@@ -111,10 +111,27 @@ Tl;dr,
// (gdb) x 0xe0001004
// (gdb) x 0xe0001004
//
//
// [Your answer here]
// [Your answer here]
/*
16
*/
//
//
// (gdb) disassemble
// (gdb) disassemble
//
//
// [Your answer here]
// [Your answer here]
/*
Dump of assembler code for function timing_resources::APP::EXTI0:
0x08000232 <+0>: movw r1, #0
0x08000236 <+4>: mrs r0, BASEPRI
=> 0x0800023a <+8>: bkpt 0x0000
0x0800023c <+10>: movt r1, #8192 ; 0x2000
0x08000240 <+14>: ldrd r2, r3, [r1]
0x08000244 <+18>: adds r2, #1
0x08000246 <+20>: adc.w r3, r3, #0
0x0800024a <+24>: strd r2, r3, [r1]
0x0800024e <+28>: msr BASEPRI, r0
0x08000252 <+32>: bx lr
End of assembler dump.
*/
//
//
// You should see that we hit the breakpoint in `exti0`, and
// You should see that we hit the breakpoint in `exti0`, and
// that the code complies to the objdump EXTI disassembly.
// that the code complies to the objdump EXTI disassembly.
...
@@ -122,10 +139,17 @@ Tl;dr,
...
@@ -122,10 +139,17 @@ Tl;dr,
// What was the software latency observed to enter the task?
// What was the software latency observed to enter the task?
//
//
// [Your answer here]
// [Your answer here]
/*
Basically nothing, after pending the interupt bit it's up to the hardware to notice the pending interupt.
After that we only need two instructions to enter the task code.
*/
//
//
// Does RTIC infer any overhead?
// Does RTIC infer any overhead?
//
//
// [Your answer here]
// [Your answer here]
/*
Yes, but very minimal. The only thing that needs to be infered is the changing of the priority ceiling.
*/
//
//
// The debugger reports that the breakpoint was hit in the `run<closure>`.
// The debugger reports that the breakpoint was hit in the `run<closure>`.
// The reason is that the RTIC implements the actual interrupt handler,
// The reason is that the RTIC implements the actual interrupt handler,
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment