Commit 25b94e5f authored by Per's avatar Per

readme project suggestions

parent a7f0a252
......@@ -209,13 +209,27 @@ Seminars
* [svd2rust](https://github.com/japaric/svd2rust) Generating
* Assignment 4
Implement a simple system with two tasks
Implement a simple system with 3 tasks
* a periodic task executing each 10ms, that blinks the onboard LED, and
* USART task receiving commands (pause, start, period)
* a shared resource (data structure) protecting the command and period
* A periodic task executing each Xms (free of accumulated drift, and with minimal jitter), that blinks the onboard LED, and
* A USART task receiving commands (pause, start, period 1-1000ms), received commands should be parsed and corresponding responses generated and sent over the USART. (Come up with a nice and simple user interface.)
* A a logging task, run each second (period 1s), that prints statistics of CPU usage over the ITM port
* Idle should gather statics on sleep/up time, (there is a sleep counter in the cortex core)
* Use shared resources (data structures) to ensure race free execution
You may use the core systic timer (relative) and the dwt cycle counter (absoulte) in combination to achieve drift free timing. Alternative you look inte the stm32f4xx timer peripheral. There is a support crate for the [STM32F3DISCOVERY](https://github.com/japaric/f3) board. Periherals are similar so you may "borrow" code from there.
Make a new git with the development and documentation.
Optional:
Find a way to measure the power consumpion. A possible solution is to power the board externally and use a power cube with current measuring capability. Alternative use an external power source with known charge (e.g., a "capacitor"), and measure the discharge time (start and residue charge at brown-out voltage), at least a precise relative measure is possible to obtain.
Operation without being connected to the USB port: in this case the serial IO and ITM needs to be connected externally (e.g., using some ftdi serial-USB).
Superoptional:
Try to minimize power consumption while maintaining desired operatotion. Lowering supply voltage and using aggressive power modes of the processor might be applied. (Not sure how USART/ITM communication can be made possible at sub 3.3v voltages. Also you have to make sure not to source the board over the communication interfaces.)
7. Macros
* Preparation
......
# Suggested projects
---
## Seer (Nils)
Symbolic execution engine for MIR internal format
- Study and understand the Z3 API
- Study and understand the user API (maybe add more functionalty)
- Study outsets for program verification based on seer
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## LED Audio (taken)
Blink leds according to audio input
---
## Drivers for NXP (Axel)
---
## WCET analysis for RTFM models using KLEE (Henrik)
- Automated testebed, integrated as cargo sub-command
---
## USB-Hid (Johannes)
---
## ETM Tracing
- Develop an API for setting up ETM trace
[ARM](https://www.arm.com/files/pdf/AT_-_Advanced_Debug_of_Cortex-M_Systems.pdf)
---
## AES Encryption in hardware
- Develop on API for hardware supported AES encryption
---
## CAN bus API and Wheel Sensor implementation
- Develop a CAN bus API for cortex-m0
- Implement a wheel sensor for existing model car
---
## Stack Memory Analys
- Seer or KLEE based path/call graph extraction
- Target code analysis, per function stack usage
- Static worst case stack analysis for RTFM and/or RTFM-TTA
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## Ethernet driver for TCP/UDP/IP stack
- Develop driver and integrate to existing TCP/UDP/IP stack
---
## Nucleo 64 support crate
- Drivers for the Nucleo 64, stm32f401re/stm32f411re, similar to the f3/bluepill support crates
---
## Time Triggered Architectuer (RTFM-TTA)
- Periodic timers
- Communication channels/message buffers
- Static analysis (for safely bound buffers)
- Static analysis for data aging (opitmal ordering?)
---
## Your ideas...
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