Skip to content
Snippets Groups Projects
Commit ae02d065 authored by anttib-5's avatar anttib-5
Browse files

bare10_3

parent cfe09b79
No related branches found
No related tags found
No related merge requests found
data 97
UsartReceiveOverflow
data 13
data 97
UsartReceiveOverflow
data 3
RingBufferOverflow
data 3
RingBufferOverflow
data 3
RingBufferOverflow
bare10
data 97
UsartReceiveOverflow
data 13
data 97
data 111
UsartReceiveOverflow
......@@ -3,5 +3,850 @@
// Hover to view descriptions of existing attributes.
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
"version": "0.2.0",
"configurations": []
"configurations": [
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "hello 16Mhz (debug)",
"preLaunchTask": "cargo build --example hello",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/hello",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "itm 16Mhz (debug)",
"preLaunchTask": "cargo build --example itm",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"postLaunchCommands": [
// here the MCU remains in 16MHz, since we use our local .cfg files
"monitor reset init"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "itm 64Mhz (debug)",
"preLaunchTask": "cargo build --example itm",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
// sets the MCU to 64Mhz
"monitor reset init"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 64000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "panic 16Mhz (debug)",
"preLaunchTask": "cargo build --example panic",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/panic",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
"b rust_begin_unwind",
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "exception_itm 16Mhz (release)",
"preLaunchTask": "cargo build --example exception_itm --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/exception_itm",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "exception_itm_raw 16Mhz (debug)",
"preLaunchTask": "cargo build --example exception_itm_raw",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/exception_itm_raw",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "crash (release)",
"preLaunchTask": "cargo build --example crash --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/crash",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
// sets a breakpoint at the HardFault (won't show in `vscode`, but `gdb` will break)
"b HardFault"
],
"cwd": "${workspaceRoot}"
},
// launch configuration for using an external itm viewer
// $ tail -f /tmp/itm.log
// or, prior to launching the bebug session
// $ mkfifo /tmp/itm.log
// $ itmdump -f /tmp/itm.log -F
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "itm 16Mhz /tmp/itm.log (debug)",
"preLaunchTask": "cargo build --example itm",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"postLaunchCommands": [
// sets the core clock to 16000000 (see ./stm32f4x.cfg)
"monitor reset init",
// 16000000 must match the core clock frequency
"monitor tpiu config internal /tmp/itm.log uart off 16000000",
// enable ITM port 0
"monitor itm port 0 on"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "device (debug)",
"preLaunchTask": "cargo build --example device --features pac",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/device",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "serial (debug)",
"preLaunchTask": "cargo build --example serial",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/serial",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "rtfm_blinky (debug)",
"preLaunchTask": "cargo build --example rtfm_blinky",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/rtfm_blinky",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare0 (debug)",
"preLaunchTask": "cargo build --example bare0",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare0",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare1 (debug)",
"preLaunchTask": "cargo build --example bare1",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare1",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare1 (release)",
"preLaunchTask": "cargo build --example bare1 --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/bare1",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare2 (debug)",
"preLaunchTask": "cargo build --example bare2",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare2",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare2 (release)",
"preLaunchTask": "cargo build --example bare2 --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/bare2",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare3 (debug)",
"preLaunchTask": "cargo build --example bare3",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare3",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare4 (debug)",
"preLaunchTask": "cargo build --example bare4",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare4",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare5 (debug)",
"preLaunchTask": "cargo build --example bare5",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare5",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare5 (release)",
"preLaunchTask": "cargo build --example bare5 --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/bare5",
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare6 (debug) 16Mhz",
"preLaunchTask": "cargo build --example bare6",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare6",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor reset halt"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000, // you may try 1000000 if not working
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare6 (debug) 64Mhz",
"preLaunchTask": "cargo build --example bare6",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare6",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
// put the MCU in 64MHz
"monitor reset init"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 64000000,
"swoFrequency": 2000000, // you may try 1000000 if not working
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare7 (debug) 16MHz",
"preLaunchTask": "cargo build --example bare7",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
// uses local config files
"configFiles": [
"./stlink.cfg",
"./stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare7 (debug) 64MHz",
"preLaunchTask": "cargo build --example bare7",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor reset halt"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 64000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare7 (debug) 84MHz",
"preLaunchTask": "cargo build --example bare7",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare7",
// uses local config files
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor reset halt"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 84000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare8 (debug)",
"preLaunchTask": "cargo build --example bare8",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare8",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare9 (debug)",
"preLaunchTask": "cargo build --example bare9",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare9",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare9 (reselase)",
"preLaunchTask": "cargo build --example bare9 --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/bare9",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM",
"port": 0
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare10 (release)",
"preLaunchTask": "cargo build --example bare10 --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/bare10",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM0",
"port": 0
},
{
"type": "console",
"label": "ITM1",
"port": 1
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "bare10 (debug)",
"preLaunchTask": "cargo build --example bare10",
"executable": "./target/thumbv7em-none-eabihf/debug/examples/bare10",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM0",
"port": 0
},
// {
// "type": "console",
// "label": "ITM1",
// "port": 1
// }
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "marcus (release)",
"preLaunchTask": "cargo build --example marcus --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/marcus",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM0",
"port": 0
},
{
"type": "console",
"label": "ITM1",
"port": 1
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
{
"type": "cortex-debug",
"request": "launch",
"servertype": "openocd",
"name": "equivalence (release)",
"preLaunchTask": "cargo build --example equivalence --release",
"executable": "./target/thumbv7em-none-eabihf/release/examples/equivalence",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"swoConfig": {
"enabled": true,
"cpuFrequency": 16000000,
"swoFrequency": 2000000,
"source": "probe",
"decoders": [
{
"type": "console",
"label": "ITM0",
"port": 0
},
{
"type": "console",
"label": "ITM1",
"port": 1
}
]
},
"svdFile": "STM32F413.svd",
"cwd": "${workspaceRoot}"
},
]
}
\ No newline at end of file
......@@ -15,9 +15,9 @@ extern crate stm32f4xx_hal as hal;
use crate::hal::prelude::*;
use crate::hal::serial::{config::Config, Event, Rx, Serial, Tx};
use hal::stm32::ITM;
use hal::gpio::{PushPull, Output, gpioa::PA5};
use nb::block;
use rtfm::app;
use rtfm::{app, Instant};
// Our error type
#[derive(Debug)]
......@@ -33,9 +33,12 @@ const APP: () = {
static mut TX: Tx<hal::stm32::USART2> = ();
static mut RX: Rx<hal::stm32::USART2> = ();
static mut ITM: ITM = ();
static mut TIMEOFFSET: u32 = 1;
static mut PA5: PA5<Output<PushPull>> = ();
static mut is_on: bool = true;
// init runs in an interrupt free section>
#[init]
#[init(schedule = [on])]
fn init() {
let stim = &mut core.ITM.stim[0];
iprintln!(stim, "bare10");
......@@ -49,6 +52,7 @@ const APP: () = {
let tx = gpioa.pa2.into_alternate_af7();
let rx = gpioa.pa3.into_alternate_af7(); // try comment out
let pa5out = gpioa.pa5.into_push_pull_output();
let mut serial = Serial::usart2(
device.USART2,
......@@ -67,6 +71,8 @@ const APP: () = {
TX = tx;
RX = rx;
PA5 = pa5out;
// For debugging
ITM = core.ITM;
}
......@@ -79,14 +85,98 @@ const APP: () = {
}
}
#[task(priority = 1, capacity = 4, resources = [ITM])]
#[task(priority = 1, capacity = 10, resources = [is_on, ITM], spawn = [on, off, setFreq])]
fn interpreter(byte: u8){
static mut B: [u8; 10] = [0u8; 10];
static mut i: usize = 0;
let stim = &mut resources.ITM.stim[0];
B[*i] = byte;
*i = *i + 1;
if (B[0] == 'o' as u8) && (B[1] == 'n' as u8) && (B[2] == 10){
resources.is_on.lock(|is_on| {
*is_on = true;
});
spawn.on().unwrap();
iprintln!(stim, "On {}");
B.iter_mut().for_each(|x| *x = 0);
*i = 0;
}
else if (B[0] == 'o' as u8) && (B[1] == 'f' as u8) && (B[2] == 'f' as u8) && (B[3] == 10){
spawn.off().unwrap();
iprintln!(stim, "Off {}");
B.iter_mut().for_each(|x| *x = 0);
*i = 0;
}
else if (B[0] == 's' as u8) && (B[1] == 'e' as u8) && (B[2] == 't' as u8){
let mut value: u32 = 0;
if B.contains(&(' ' as u8)) && (B.contains(&13) || B.contains(&10)) {
for n in &B[4..*i-1] {
if n.is_ascii_digit() {
value = value * 10;
value = value + (u32::from(*n-48));
}
}
if value != 0 {
iprintln!(stim, "Set {}", value);
spawn.setFreq(value).unwrap();
B.iter_mut().for_each(|x| *x = 0);
*i = 0;
}
}
}
else if (B.contains(&13) || B.contains(&10)){
//Resets B!
B.iter_mut().for_each(|x| *x = 0);
*i = 0;
}
}
#[task(priority = 4, schedule = [on], resources = [PA5, TIMEOFFSET, is_on], spawn = [on])]
fn on(){
static mut light_toggle: bool = true;
let mut time: u32 = 0;
resources.TIMEOFFSET.lock(|timeoffset| {
time = *timeoffset;
});
if *resources.is_on{
if *light_toggle{
resources.PA5.set_high();
}
else{
resources.PA5.set_low();
}
*light_toggle = !*light_toggle;
schedule.on(Instant::now() + (8_000_000/time).cycles()).unwrap();
}
else{
resources.PA5.set_low();
*light_toggle = false;
}
}
#[task(priority = 4, resources = [is_on])]
fn off(){
*resources.is_on = false;
}
#[task(priority = 2, resources = [TIMEOFFSET])]
fn setFreq(freq: u32){
resources.TIMEOFFSET.lock(|timeoffset| {
*timeoffset = freq;
});
}
#[task(priority = 1, capacity = 3, resources = [ITM])]
fn trace_data(byte: u8) {
let stim = &mut resources.ITM.stim[0];
iprintln!(stim, "data {}", byte);
for _ in 0..10000 {
asm::nop();
asm::nop();
}
}
}
#[task(priority = 1, resources = [ITM])]
fn trace_error(error: Error) {
......@@ -101,17 +191,16 @@ const APP: () = {
if block!(tx.write(byte)).is_err() {
let _ = spawn.trace_error(Error::UsartSendOverflow);
}
}
#[interrupt(priority = 3, resources = [RX], spawn = [trace_data, trace_error, echo])]
#[interrupt(priority = 3, resources = [RX], spawn = [trace_error, echo, interpreter])]
fn USART2() {
let rx = resources.RX;
match rx.read() {
Ok(byte) => {
let _ = spawn.echo(byte);
if spawn.trace_data(byte).is_err() {
if spawn.interpreter(byte).is_err() {
let _ = spawn.trace_error(Error::RingBufferOverflow);
}
}
......@@ -126,6 +215,7 @@ const APP: () = {
extern "C" {
fn EXTI0();
fn EXTI1();
fn EXTI2();
}
};
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment