bare5_2

examples/rtic_bare5.rs

@@ -25,6 +25,7 @@ mod stm32f40x {
         pub const GPIOA_BASE: u32       = AHB1PERIPH_BASE + 0x0000;
     }
     use address::*;
+    use cortex_m_semihosting::hprint;
 
     pub struct VolatileCell<T> {
         pub value: cell::UnsafeCell<T>,
@@ -58,7 +59,19 @@ mod stm32f40x {
     impl VolatileCell<u32> {
         #[inline(always)]
         pub fn modify(&self, offset: u8, width: u8, value: u32) {
-            // your code here
+
+            let cell_val = VolatileCell::read(&self);
+            let mut mask = 0;
+
+            for i in 0..width {
+                mask |= 1 << i;
+            }
+
+            let masked_value = value & mask;
+
+            let return_val = (cell_val & !(mask << offset)) | masked_value << offset;
+            VolatileCell::write(&self, return_val)
+            
         }
     }
 
@@ -177,7 +190,7 @@ const APP: () = {
         let r = gpioa.MODER.read() & !(0b11 << (5 * 2)); // read and mask
         gpioa.MODER.write(r | 0b01 << (5 * 2)); // set output mode
 
-        // test_modify();
+        test_modify();
 
         loop {
             // set PA5 high
@@ -243,6 +256,6 @@ const APP: () = {
 //    What if we could automatically generate that from Vendors specifications (SVD files)?
 //    Wouldn't that be great?
 //
-//    ** your answer here **
+//      Sure, I guess...
 //
 //    Commit your answers (bare5_2)