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Commit 0b24342e authored by Josef Utbult's avatar Josef Utbult
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bare6_0

parent 4fb502c2
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......@@ -70,7 +70,7 @@ const APP: () = {
// .pclk1(64.mhz())
// .pclk2(64.mhz())
// .freeze();
//
// let _clocks = rcc
// .cfgr
// .sysclk(84.mhz())
......@@ -202,11 +202,11 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
//
// `rcc.cfgr.sysclk(64.mhz()).pclk1(64.mhz()).pclk2(64.mhz()).freeze()`;
//
// ** your answer here **
// PCLK1 can only run up to 48MHz
//
// `rcc.cfgr.sysclk(84.mhz()).pclk1(42.mhz()).pclk2(64.mhz()).freeze();`
//
// ** your answer here **
// I guess that there should be some kind of divission factor between pcklk1 and 2 or something
//
// Start `stm32cubemx` and select or create a project targeting stm32f401.
// Go to the graphical clock configuration view.
......@@ -217,16 +217,14 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
//
// What happens?
//
// ** your answer here **
// Nothing happens. The led is off
//
// Try to setup the clock according to:
//
// What happens?
// The led blinks way to fast
//
// `rcc.cfgr.sysclk(84.mhz()).pclk1(42.mhz()).pclk2(64.mhz()).freeze();`
//
// ** your answer here **
//
// Commit your answers (bare6_0)
//
// 1. In this example you will use RTT.
......
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