bare1_1

Cargo.toml

@@ -28,7 +28,7 @@ optional = true
 
 [dependencies.cortex-m]
 version = "0.5.8"
-# features = ["inline-asm"] # <- currently requires nightly compiler
+features = ["inline-asm"] # <- currently requires nightly compiler
 
 # Uncomment for the allocator example.
 # alloc-cortex-m = "0.3.5"

examples/bare1.rs

@@ -13,6 +13,8 @@
 extern crate panic_halt;
 
 use cortex_m_rt::entry;
+use cortex_m::{iprintln, Peripherals};
+use cortex_m_semihosting::hprintln;
 
 #[entry]
 #[inline(never)]
@@ -20,11 +22,15 @@ fn main() -> ! {
     // Prepend by `x` by _ to avoid warning (never used).
     // The compiler is smart enough to figure out that
     // `x` is not used in any menaningful way.
+    let mut p = Peripherals::take().unwrap();
+    let stim = &mut p.ITM.stim[0];
 
     let mut _x = 0;
     loop {
         _x += 1;
         cortex_m::asm::nop();
+        iprintln!(stim, "{}",_x);
+        hprintln!("{}", _x).unwrap();
         cortex_m::asm::bkpt();
         _x -= 1;
     }
@@ -55,10 +61,10 @@ fn main() -> ! {
 //    loop, (press pause/suspend to verify this).
 //    what is the output in the ITM console
 //
-//    ** your answer here **
+//    ** 1 **
 //
 //    What is the output in the semihosting (openocd) console
-//    ** your answer here **
+//    ** 1 **
 //
 //    Commit your answers (bare1_1)
 //