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openocd.gdb
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Per Lindgren / e7020e_2019
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Per Lindgren authored
bt broken? Cargo.toml no nightly dep more examples preLaunchTask crash re-added more preLaunchTasks example/device and SVD openocd.gdb comment fixed and ext itm launch config added bare0 bare1 bare1 bare2 and bare3 bare2 and bare3 bare2 and bare3 bare4 and bare5 bare6 wip bare6 wip serial wip serial wip bare7 bare8 bare8 to fresk to fresk to fresk to fresk bare8, 9 to fresk bare7 polishing bare9 rtfm_blinky wip rtfm_blinky rtfm_blinky marcus eq implemented and tested eq implemented and tested bare10 bare updates bare 6 assignment cargo fix various fixes
Per Lindgren authoredbt broken? Cargo.toml no nightly dep more examples preLaunchTask crash re-added more preLaunchTasks example/device and SVD openocd.gdb comment fixed and ext itm launch config added bare0 bare1 bare1 bare2 and bare3 bare2 and bare3 bare2 and bare3 bare4 and bare5 bare6 wip bare6 wip serial wip serial wip bare7 bare8 bare8 to fresk to fresk to fresk to fresk bare8, 9 to fresk bare7 polishing bare9 rtfm_blinky wip rtfm_blinky rtfm_blinky marcus eq implemented and tested eq implemented and tested bare10 bare updates bare 6 assignment cargo fix various fixes
openocd.gdb 883 B
target extended-remote :3333
# print demangled symbols
set print asm-demangle on
# detect unhandled exceptions, hard faults and panics
#break DefaultHandler
break HardFault
break rust_begin_unwind
# *try* to stop at the user entry point (it might be gone due to inlining)
break main
monitor arm semihosting enable
# send captured ITM to the file (fifo) /tmp/itm.log
# (the microcontroller SWO pin must be connected to the programmer SWO pin)
# 16000000 must match the core clock frequency
monitor tpiu config internal /tmp/itm.log uart off 16000000
# OR: make the microcontroller SWO pin output compatible with UART (8N1)
# 8000000 must match the core clock frequency
# 2000000 is the frequency of the SWO pin
# monitor tpiu config external uart off 8000000 2000000
# enable ITM port 0
monitor itm port 0 on
load
# start the process but immediately halt the processor
stepi