Skip to content
Snippets Groups Projects
Commit 580c8552 authored by Per Lindgren's avatar Per Lindgren
Browse files

intro

parent 7b642198
No related branches found
No related tags found
No related merge requests found
[target.thumbv7m-none-eabi]
# uncomment this to make `cargo run` execute programs on QEMU
# runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel"
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# uncomment ONE of these three option to make `cargo run` start a GDB session
# which option to pick depends on your system
# runner = "arm-none-eabi-gdb -q -x jlink.gdb"
runner = "arm-none-eabi-gdb -q -x openocd.gdb"
# runner = "gdb-multiarch -q -x openocd.gdb"
# runner = "gdb -q -x openocd.gdb"
rustflags = [
# LLD (shipped with the Rust toolchain) is used as the default linker
"-C", "link-arg=-Tlink.x",
# if you run into problems with LLD switch to the GNU linker by commenting out
# this line
# "-C", "linker=arm-none-eabi-ld",
# if you need to link to pre-compiled C libraries provided by a C toolchain
# use GCC as the linker by commenting out both lines above and then
# uncommenting the three lines below
# "-C", "linker=arm-none-eabi-gcc",
# "-C", "link-arg=-Wl,-Tlink.x",
# "-C", "link-arg=-nostartfiles",
# uncomment for unchecked wrapping arithmetics also in dev mode
# "-Z", "force-overflow-checks=off",
]
[build]
# Pick ONE of these compilation targets
# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
# target = "thumbv7m-none-eabi" # Cortex-M3
# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
[package]
name = "app"
categories = ["embedded", "no-std"]
authors = ["Per Lindgren <per.lindgren@ltu.se>", "Emil Fresk <emil.fresk@gmail.com>"]
description = "Example project"
keywords = ["arm", "cortex-m", "mav"]
license = "MIT OR Apache-2.0"
repository = "https://github.com/korken89/trustflight_firmware"
version = "0.1.0"
edition = "2018"
[dependencies]
panic-halt = "0.2"
panic-semihosting = "0.5"
cortex-m-rtfm = "0.5.1"
cortex-m-semihosting = "0.3.5"
cortex-m = "0.6.2"
aligned = "0.3.2"
ufmt = "0.1.0"
[dependencies.cortex-m-rt]
version = "0.6.12"
[dependencies.stm32f4xx-hal]
version = "0.6.0"
features = ["stm32f401", "rt"]
optional = true
# this lets you use `cargo fix`!
[[bin]]
name = "app"
test = false
bench = false
# Built options for different examples
# [[example]]
[profile.dev]
opt-level = 1
codegen-units = 16
debug = true
lto = false
[profile.release]
opt-level = "s" # optimize for size
codegen-units = 1 # better optimizations
debug = true # symbols are nice and they don't increase the size on Flash
lto = true # better optimizations
//! Prints "Hello, world!" on the host console using semihosting
#![no_main]
#![no_std]
extern crate panic_halt;
use cortex_m_rt::entry;
use cortex_m_semihosting::hprintln;
#[entry]
fn main() -> ! {
hprintln!("Hello, world!").unwrap();
loop {}
}
//! Sends "Hello, agian!" over the ITM port 0
//!
//! ITM is much faster than semihosting. Like 4 orders of magnitude or so.
//!
//! You'll need [`itmdump`] to receive the message on the host plus you'll need to uncomment two
//! `monitor` commands in the `.gdbinit` file.
//!
//! [`itmdump`]: https://docs.rs/itm/0.2.1/itm/
//!
//! ---
#![no_main]
#![no_std]
extern crate panic_halt;
use cortex_m::{iprintln, Peripherals};
use cortex_m_rt::entry;
#[entry]
fn main() -> ! {
let mut p = Peripherals::take().unwrap();
let stim = &mut p.ITM.stim[0];
iprintln!(stim, "Hello, again!");
loop {}
}
memory.x 0 → 100644
MEMORY
{
/* NOTE K = KiBi = 1024 bytes */
FLASH : ORIGIN = 0x08000000, LENGTH = 64K
RAM : ORIGIN = 0x20000000, LENGTH = 32K
}
/* This is where the call stack will be allocated. */
/* The stack is of the full descending type. */
/* NOTE Do NOT modify `_stack_start` unless you know what you are doing */
_stack_start = ORIGIN(RAM) + LENGTH(RAM);
\ No newline at end of file
source [find interface/stlink.cfg]
transport select hla_swd
# increase working area to 64KB
# set WORKAREASIZE 0x10000
source [find target/stm32f4x.cfg]
# reset_config srst_only
# tpiu config internal /tmp/itm.fifo uart off 16000000 1000000
target extended-remote :3333
set print asm-demangle on
monitor arm semihosting enable
monitor tpiu config internal /tmp/itm.fifo uart off 16000000 2000000
# enable itm ports
monitor itm port 0 on
monitor itm port 1 on
monitor itm port 2 on
# *try* to stop at the user entry point (it might be gone due to inlining)
break main
# detect unhandled exceptions, hard faults and panics
break HardFault
break core::panicking::panic_fmt
# un-comment to check that flashing was successful
# compare-sections
monitor reset init
load
stepi
\ No newline at end of file
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment