Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
E
e7020e_2020
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Anton Grahn
e7020e_2020
Commits
19008d4f
Commit
19008d4f
authored
5 years ago
by
Anton Grahn
Browse files
Options
Downloads
Patches
Plain Diff
bare5_2
parent
cbafba1b
No related branches found
No related tags found
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
examples/bare5.rs
+52
-37
52 additions, 37 deletions
examples/bare5.rs
with
52 additions
and
37 deletions
examples/bare5.rs
+
52
−
37
View file @
19008d4f
...
...
@@ -9,16 +9,18 @@
#![no_std]
#![no_main]
extern
crate
panic_
halt
;
extern
crate
panic_
semihosting
;
extern
crate
cortex_m
;
use
cortex_m_rt
::
entry
;
use
cortex_m_semihosting
::{
hprint
,
hprintln
};
// C like API...
mod
stm32f40x
{
#[allow(dead_code)]
use
core
::{
cell
,
ptr
};
use
cortex_m_semihosting
::{
hprint
,
hprintln
};
#[rustfmt::skip]
mod
address
{
pub
const
PERIPH_BASE
:
u32
=
0x40000000
;
...
...
@@ -50,19 +52,31 @@ mod stm32f40x {
}
}
// modify (reads, modifies a field, and writes the volatile cell)
//
// parameters:
// offset (field offset)
// width (field width)
// value (new value that the field should take)
//
// impl VolatileCell<u32> {
// #[inline(always)]
// pub fn modify(&self, offset: u8, width: u8, value: u32) {
// // your code here
// }
// }
//modify (reads, modifies a field, and writes the volatile cell)
//parameters:
//offset (field offset)
//width (field width)
//value (new value that the field should take)
impl
VolatileCell
<
u32
>
{
#[inline(always)]
pub
fn
modify
(
&
self
,
offset
:
u8
,
width
:
u8
,
value
:
u32
)
{
unsafe
{
let
mut
mask
:
u32
=
1
;
for
i
in
0
..
width
{
mask
=
mask
|
1
<<
i
;
}
mask
=
mask
<<
offset
;
let
vaoff
=
(
value
<<
offset
);
let
vaoffmask
=
vaoff
&
mask
;
let
readinvmask
=
self
.read
()
&
!
mask
;
let
finalval
=
readinvmask
|
vaoffmask
;
hprintln!
(
"{:#b}"
,
finalval
);
self
.write
(
finalval
);
}
}
}
#[repr(C)]
#[allow(non_snake_case)]
...
...
@@ -140,28 +154,29 @@ fn wait(i: u32) {
}
}
// simple test of Your `modify`
//fn test() {
// let t:VolatileCell<u32> = unsafe { core::mem::uninitialized() };
// t.write(0);
// assert!(t.read() == 0);
// t.modify(3, 3, 0b10101);
// //
// // 10101
// // ..0111000
// // ---------
// // 000101000
// assert!(t.read() == 0b101 << 3);
// t.modify(4, 3, 0b10001);
// // 000101000
// // 111
// // 001
// // 000011000
// assert!(t.read() == 0b011 << 3);
// if << is used, your code will panic in dev (debug), but not in release mode
// t.modify(32, 3, 1);
//}
//simple test of Your `modify`
fn
test
()
{
let
t
:
VolatileCell
<
u32
>
=
unsafe
{
core
::
mem
::
uninitialized
()
};
t
.write
(
0
);
assert!
(
t
.read
()
==
0
);
hprintln!
(
"{:?}"
,
123
)
.unwrap
();
t
.modify
(
3
,
3
,
0b10101
);
//
// 10101
// ..0111000
// ---------
// 000101000
assert!
(
t
.read
()
==
0b101
<<
3
);
t
.modify
(
4
,
3
,
0b10001
);
// 000101000
// 111
// 001
// 000011000
assert!
(
t
.read
()
==
0b011
<<
3
);
//if << is used, your code will panic in dev (debug), but not in release mode
t
.modify
(
32
,
3
,
1
);
}
// system startup, can be hidden from the user
#[entry]
...
...
@@ -169,7 +184,7 @@ fn main() -> ! {
let
rcc
=
unsafe
{
&
mut
*
RCC
::
get
()
};
// get the reference to RCC in memory
let
gpioa
=
unsafe
{
&
mut
*
GPIOA
::
get
()
};
// get the reference to GPIOA in memory
//
test(); // uncomment to run test
test
();
// uncomment to run test
idle
(
rcc
,
gpioa
);
loop
{
continue
;
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment