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Commit 31723fae authored by Carl Österberg's avatar Carl Österberg
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tasks done

parent 2509ec53
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...@@ -57,10 +57,12 @@ const APP: () = { ...@@ -57,10 +57,12 @@ const APP: () = {
#[init] #[init]
fn init(_cx: init::Context) { fn init(_cx: init::Context) {
// power on GPIOA // power on GPIOA
//6.3.11
let r = read_u32(RCC_AHB1ENR); // read let r = read_u32(RCC_AHB1ENR); // read
write_u32(RCC_AHB1ENR, r | 1); // set enable write_u32(RCC_AHB1ENR, r | 1); // set enable
// configure PA5 as output // configure PA5 as output
//8.4.1
let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
...@@ -100,7 +102,7 @@ const APP: () = { ...@@ -100,7 +102,7 @@ const APP: () = {
// //
// What was the error message and explain why. // What was the error message and explain why.
// //
// error[E0133]: call to unsafe function is unsafe and requires unsafe function or block // error[E0133]: call to unsafe function is unsafe and requires unsafe function or block.
// A volatile read to register clashes with rusts memory safety, therefor we must tell the compiler // A volatile read to register clashes with rusts memory safety, therefor we must tell the compiler
// that we know what we are doing and just go with it. // that we know what we are doing and just go with it.
// //
...@@ -127,9 +129,11 @@ const APP: () = { ...@@ -127,9 +129,11 @@ const APP: () = {
// //
// If we try to access GPIOA_MODER before its powered we wont be able to write to it. // If we try to access GPIOA_MODER before its powered we wont be able to write to it.
// //
// Without the non-reordering property of `write_volatile/read_volatile` could that happen in theory // With the reordering property of `write_volatile/read_volatile` could that happen in theory
// (argue from the point of data dependencies). // (argue from the point of data dependencies).
// //
// ** your answer here ** // Maybe some read operation which is a load from memory gets optimizied into
// being moved around because in pipelineing mode a load takes an extra
// clock cycle.
// //
// Commit your answers (bare4_3) // Commit your answers (bare4_3)
...@@ -64,8 +64,9 @@ mod stm32f40x { ...@@ -64,8 +64,9 @@ mod stm32f40x {
mask = mask >> (32-width); mask = mask >> (32-width);
mask = mask << offset; mask = mask << offset;
let altered = mask & (value << offset); let altered = mask & (value << offset);
//hprintln!("Altered {:b}", !altered).ok(); hprintln!("Mask {:b}", mask).ok();
//hprintln!("Old {:b}", (self.read()&!mask)).ok(); hprintln!("Altered {:b}", altered).ok();
hprintln!("Old {:b}", (self.read()&!mask)).ok();
self.write((self.read()&!mask) | altered); self.write((self.read()&!mask) | altered);
} }
} }
...@@ -159,16 +160,16 @@ fn test_modify() { ...@@ -159,16 +160,16 @@ fn test_modify() {
// ..0111000 // ..0111000
// --------- // ---------
// 000101000 // 000101000
//hprintln!("Current {:b}", t.read()).ok(); hprintln!("Current {:b}", t.read()).ok();
//hprintln!("Correct {:b}", 0b101 << 3).ok(); hprintln!("Correct {:b}", 0b101 << 3).ok();
assert!(t.read() == 0b101 << 3); assert!(t.read() == 0b101 << 3);
t.modify(4, 3, 0b10001); t.modify(4, 3, 0b10001);
// 000101000 // 000101000
// 111 // 111
// 001 // 001
// 000011000 // 000011000
//hprintln!("Current {:b}", t.read()).ok(); hprintln!("Current {:b}", t.read()).ok();
//hprintln!("Correct {:b}", 0b011 << 3).ok(); hprintln!("Correct {:b}", 0b011 << 3).ok();
assert!(t.read() == 0b011 << 3); assert!(t.read() == 0b011 << 3);
// //
// add more tests here if you like // add more tests here if you like
......
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