bare8 (updated to RTFM5)

examples/bare8.rs

@@ -14,7 +14,7 @@
 
 extern crate panic_halt;
 
-use cortex_m::{asm, iprintln};
+use cortex_m::iprintln;
 use nb::block;
 
 extern crate stm32f4xx_hal as hal;
@@ -24,16 +24,21 @@ use hal::stm32::{ITM, USART2};
 
 use rtfm::app;
 
-#[app(device = hal::stm32)]
+#[app(device = hal::stm32, peripherals = true)]
 const APP: () = {
-    // Late resources
-    static mut TX: Tx<USART2> = ();
-    static mut RX: Rx<USART2> = ();
-    static mut ITM: ITM = ();
+    struct Resources {
+        // Late resources
+        TX: Tx<USART2>,
+        RX: Rx<USART2>,
+        ITM: ITM,
+    }
 
     // init runs in an interrupt free section
     #[init]
-    fn init() {
+    fn init(cx: init::Context) -> init::LateResources {
+        let mut core = cx.core;
+        let device = cx.device;
+
         let stim = &mut core.ITM.stim[0];
         iprintln!(stim, "bare8");
 
@@ -45,9 +50,7 @@ const APP: () = {
         let gpioa = device.GPIOA.split();
 
         let tx = gpioa.pa2.into_alternate_af7();
-        let rx = gpioa.pa3.into_alternate_af7(); 
-
-        asm::bkpt();
+        let rx = gpioa.pa3.into_alternate_af7();
 
         let serial = Serial::usart2(
             device.USART2,
@@ -61,23 +64,25 @@ const APP: () = {
         let (tx, rx) = serial.split();
 
         // Late resources
-        TX = tx;
-        RX = rx;
-        ITM = core.ITM;
+        init::LateResources {
+            TX: tx,
+            RX: rx,
+            ITM: core.ITM,
+        }
     }
 
-    // idle may be interrupted by other interrupt/tasks in the system
+    // idle may be interrupted by other interrupts/tasks in the system
     #[idle(resources = [RX, TX, ITM])]
-    fn idle() -> ! {
-        let rx = resources.RX;
-        let tx = resources.TX;
-        let stim = &mut resources.ITM.stim[0];
+    fn idle(cx: idle::Context) -> ! {
+        let rx = cx.resources.RX;
+        let tx = cx.resources.TX;
+        let stim = &mut cx.resources.ITM.stim[0];
 
         loop {
             match block!(rx.read()) {
                 Ok(byte) => {
                     iprintln!(stim, "Ok {:?}", byte);
-                    tx.write(byte).unwrap(); 
+                    tx.write(byte).unwrap();
                 }
                 Err(err) => {
                     iprintln!(stim, "Error {:?}", err);
@@ -87,32 +92,13 @@ const APP: () = {
     }
 };
 
-
+// Optional assignment
 // 0. Compile and run the example. Notice, we use the default 16MHz clock.
 //
-//    > cargo build --example bare7 --features "hal rtfm"
+//    > cargo build --example bare8 --features "rtfm"
 //    (or use the vscode build task)
 //
-//    The "hal" feature enables the optional dependencies stm32f4xx-hal and rtfm".
-//
-//    Cargo.toml:
-// 
-//    [dependencies.cortex-m-rtfm]
-//    version = "0.4.0"
-//    optional = true
-// 
-//    [dependencies.stm32f4xx-hal]
-//    git = "https://github.com/stm32-rs/stm32f4xx-hal.git"
-//    version = "0.2.8"
-//    features = ["stm32f413", "rt"]
-//    optional = true
-//
-//    [features]
-//    pac = ["stm32f4"]
-//    hal = ["stm32f4xx-hal"]
-//    rtfm = ["cortex-m-rtfm"]
-//
-// 1. Our CPU now runs slower, did it effect the behavior?
+// 1. What is the behavior in comparison to bare7.4 and bare7.5
 //
 //    ** your answer here **
 //
@@ -129,7 +115,7 @@ const APP: () = {
 //    (are you know loosing more data)?
 //
 //    ** your answer here **
-// 
+//
 //    Commit your answer (bare8_3)
 //
 // 4. *Optional
@@ -140,6 +126,5 @@ const APP: () = {
 //    How did the optimized build compare to the debug build (performance/lost bytes)
 //
 //    ** your answer here **
-// 
+//
 //    Commit your answer (bare8_4)
-