fetch new bare labs

.vscode/launch.json

@@ -18,7 +18,7 @@
             "executable": "./target/thumbv7em-none-eabihf/debug/app",
             "configFiles": [
                 "interface/stlink-v2-1.cfg",
-                "target/stm32f4x.cfg"
+                "target/stm32l0.cfg"
             ],
             "postLaunchCommands": [
                 "monitor arm semihosting enable"

.vscode/tasks.json

@@ -29,8 +29,8 @@
         },
         {
             "type": "shell",
-            "label": "cargo build --example",
-            "command": "cargo build --example ${fileBasenameNoExtension}",
+            "label": "cargo build --examples",
+            "command": "cargo build --example ${fileBasenameNoExtension} --features='rtfm'",
             "group": {
                 "kind": "build",
                 "isDefault": true

Cargo.toml

@@ -11,13 +11,13 @@ edition = "2018"
 
 [dependencies]
 panic-halt              = "0.2"
-panic-semihosting       = "0.5" # comment out for `cargo doc`
-panic-itm               = "0.4.1" # comment out for `cargo doc`
+#panic-semihosting       = "0.5" # comment out for `cargo doc`
+#panic-itm               = "0.4.1" # comment out for `cargo doc`
 cortex-m-semihosting    = "0.3.5"
 aligned                 = "0.3.2"
 ufmt                    = "0.1.0"
 nb                      = "0.1.2"
-heapless = "0.5.3"
+heapless                = "0.5.3"
 
 [dependencies.cortex-m]
 version         = "0.6.2"

examples/bare2.rs

@@ -34,6 +34,15 @@ fn main() -> ! {
     let mut dwt = p.DWT;
 
     iprintln!(stim, "bare2");
+    #[interrupt(priority = 3, resources = [RX, INT])]
+    fn EXTI0_1() {
+        resources.INT.clear_irq(resources.RX.pin_number());
+        hprintln!("{}", resources.RX.pin_number()).unwrap();
+        // spawn.button_event().unwrap();
+
+        // let mut int = resources.INT;     
+    }
+
 
     dwt.enable_cycle_counter();
 

openocd.cfg

+# source [find interface/stlink.cfg]
 source [find interface/stlink-v2-1.cfg]
 
 transport select hla_swd
@@ -5,6 +6,7 @@ transport select hla_swd
 # increase working area to 64KB
 # set WORKAREASIZE 0x10000
 
+# source [find target/stm32l0.cfg]
 source [find target/stm32f4x.cfg]
 
 # reset_config srst_only