diff --git a/examples/bare6.rs b/examples/bare6.rs
index ba170e72b83fe0239e8bcceb04822de19cf2c474..22c18803cba45c8dae41ca21c59894ad9efb140e 100644
--- a/examples/bare6.rs
+++ b/examples/bare6.rs
@@ -43,10 +43,10 @@ fn idle(stim: &mut Stim, rcc: RCC, gpioa: GPIOA) {
     iprintln!(stim, "idle");
 
     // power on GPIOA, RM0368 6.3.11
-    rcc.ahb1enr.modify(|_, w| w.gpioaen().set_bit());
+    rcc.ahb1enr.modify(|_, w| w.gpioaen().enabled()); // .set_bit()
 
     // configure PA5 as output, RM0368 8.4.1
-    gpioa.moder.modify(|_, w| w.moder5().bits(1));
+    gpioa.moder.modify(|_, w| w.moder5().output() ); // .bits(1)
 
     // at 16 Mhz, 8_000_000 cycles = period 0.5s
     // at 64 Mhz, 4*8_000_000 cycles = period 0.5s
@@ -83,22 +83,22 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
     // mco2 	: SYSCLK = 0b00
     // mcopre 	: divide by 4 = 0b110
     rcc.cfgr
-        .modify(|_, w| unsafe { w.mco2().bits(0b00).mco2pre().bits(0b110) });
+        .modify(|_, w| unsafe { w.mco2().sysclk().mco2pre().div4() }); // w.mco2().bits(0b00).mco2pre().bits(0b110)
    
     // power on GPIOC, RM0368 6.3.11
-    rcc.ahb1enr.modify(|_, w| w.gpiocen().set_bit());
+    rcc.ahb1enr.modify(|_, w| w.gpiocen().enabled() ); //
 
     // MCO_2 alternate function AF0, STM32F401xD STM32F401xE data sheet
     // table 9
     // AF0, gpioc reset value = AF0
 
     // configure PC9 as alternate function 0b10, RM0368 6.2.10
-    gpioc.moder.modify(|_, w| w.moder9().bits(0b10));
+    gpioc.moder.modify(|_, w| w.moder9().alternate()); //.bits(0b10)
     
     // otyper reset state push/pull, in reset state (don't need to change)
 
     // ospeedr 0b11 = very high speed
-    gpioc.ospeedr.modify(|_, w| w.ospeedr9().bits(0b11));
+    gpioc.ospeedr.modify(|_, w| w.ospeedr9().very_high_speed()); //.bits(0b11)
 }
 
 // 0. Compile and run the example, in 16Mhz