diff --git a/.gitignore b/.gitignore
index 59a4524385b07ca938c09f854be9919754938cfd..c6e6c3fd166c095ecdb0a81418075530a3e85454 100644
--- a/.gitignore
+++ b/.gitignore
@@ -3,3 +3,4 @@
 .gdb_history
 Cargo.lock
 target/
+*.pdf
\ No newline at end of file
diff --git a/examples/bare4.rs b/examples/bare4.rs
index 75fec4e08efcd477b35fd17df4e5acb38e74071a..104c025dcec7ff20d925a8016701208d49bf4d76 100644
--- a/examples/bare4.rs
+++ b/examples/bare4.rs
@@ -19,13 +19,13 @@ use cortex_m_rt::entry;
 // Peripheral addresses as constants
 #[rustfmt::skip]
 mod address {
-    pub const PERIPH_BASE: u32      = 0x40000000;
-    pub const AHB1PERIPH_BASE: u32  = PERIPH_BASE + 0x00020000;
-    pub const RCC_BASE: u32         = AHB1PERIPH_BASE + 0x3800;
-    pub const RCC_AHB1ENR: u32      = RCC_BASE + 0x30;
-    pub const GBPIA_BASE: u32       = AHB1PERIPH_BASE + 0x0000;
-    pub const GPIOA_MODER: u32      = GBPIA_BASE + 0x00;
-    pub const GPIOA_BSRR: u32       = GBPIA_BASE + 0x18;
+    pub const PERIPH_BASE: u32      = 0x40000000;               // Seen in memory map, 2.3
+    pub const AHB1PERIPH_BASE: u32  = PERIPH_BASE + 0x00020000; // GPIO(A) registers, 8.4
+    pub const RCC_BASE: u32         = AHB1PERIPH_BASE + 0x3800; // RCC registers, 6.3
+    pub const RCC_AHB1ENR: u32      = RCC_BASE + 0x30;          // 6.3.9
+    pub const GBPIA_BASE: u32       = AHB1PERIPH_BASE + 0x0000; // 8.4
+    pub const GPIOA_MODER: u32      = GBPIA_BASE + 0x00;        // 8.4.1
+    pub const GPIOA_BSRR: u32       = GBPIA_BASE + 0x18;        // GPIO port bit set/reset register BSRR 8.4.7
 }
 
 use address::*;
@@ -55,11 +55,11 @@ fn wait(i: u32) {
 
 #[entry]
 fn main() -> ! {
-    // power on GPIOA
+    // power on GPIOA, 6.3.9
     let r = read_u32(RCC_AHB1ENR); // read
     write_u32(RCC_AHB1ENR, r | 1); // set enable
 
-    // configure PA5 as output
+    // configure PA5 as output, 8.4.1
     let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
     write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
 
@@ -67,11 +67,11 @@ fn main() -> ! {
     // this is more efficient as the read register is not needed.
 
     loop {
-        // set PA5 high
+        // set PA5 high, 8.4.7
         write_u32(GPIOA_BSRR, 1 << 5); // set bit, output hight (turn on led)
         wait(10_000);
 
-        // set PA5 low
+        // set PA5 low, 8.4.7
         write_u32(GPIOA_BSRR, 1 << (5 + 16)); // clear bit, output low (turn off led)
         wait(10_000);
     }
@@ -84,7 +84,7 @@ fn main() -> ! {
 //
 // 1.  Did you enjoy the blinking?
 //
-//    ** your answer here **
+//    ** Thouroughly **
 //
 //    Now lookup the data-sheets, and read each section referred,
 //    6.3.11, 8.4.1, 8.4.7