From e22cbd077c28ccfb340dc118ec259f37f5e23726 Mon Sep 17 00:00:00 2001
From: rubenasplund <ruben.asplund@hotmail.com>
Date: Sat, 5 Dec 2020 00:02:27 +0100
Subject: [PATCH] Updated timing_resources

---
 examples/timing_resources.rs | 29 ++++++++++++++++++++++++++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/examples/timing_resources.rs b/examples/timing_resources.rs
index f4b4862..ed569ef 100644
--- a/examples/timing_resources.rs
+++ b/examples/timing_resources.rs
@@ -72,6 +72,17 @@ const APP: () = {
 // Explain what is happening here in your own words.
 //
 // [Your code here]
+// 08000232 <EXTI0>:
+// 8000232: 40 f2 00 01  	movw	r1, #0          (Set register r1 to 0.)
+// 8000236: ef f3 11 80  	mrs	r0, basepri         (Read special register basepri into register r0.)
+// 800023a: 00 be        	bkpt	#0              (Breakpoint.)
+// 800023c: c2 f2 00 01  	movt	r1, #8192       (Set register r1 upper 16 bits to 8192.)
+// 8000240: d1 e9 00 23  	ldrd	r2, r3, [r1]    (Load double word into r2 and r3.)
+// 8000244: 01 32        	adds	r2, #1          (Add 1 to register r2.)
+// 8000246: 43 f1 00 03  	adc	r3, r3, #0          (Add 0 to register r3 with carry.)
+// 800024a: c1 e9 00 23  	strd	r2, r3, [r1]    (Store double word into r2 and r3.)
+// 800024e: 80 f3 11 88  	msr	basepri, r0         (Write r0 into special register basepri.)
+// 8000252: 70 47        	bx	lr                  (Branch/Jumps away to another line.)
 //
 // > cargo run --example timing_resources --release --features nightly
 // Then continue to the first breakpoint instruction:
@@ -90,11 +101,22 @@ const APP: () = {
 //
 // (gdb) x 0xe0001004
 //
-// [Your answer here]
+// [0x00000010 = 16]
 //
 // (gdb) disassemble
 //
 // [Your answer here]
+// Dump of assembler code for function timing_resources::APP::EXTI0:
+// 0x08000232 <+0>:     movw    r1, #0
+// 0x08000236 <+4>:     mrs     r0, BASEPRI
+// => 0x0800023a <+8>:     bkpt    0x0000
+// 0x0800023c <+10>:    movt    r1, #8192       ; 0x2000
+// 0x08000240 <+14>:    ldrd    r2, r3, [r1]
+// 0x08000244 <+18>:    adds    r2, #1
+// 0x08000246 <+20>:    adc.w   r3, r3, #0
+// 0x0800024a <+24>:    strd    r2, r3, [r1]
+// 0x0800024e <+28>:    msr     BASEPRI, r0
+// 0x08000252 <+32>:    bx      lr
 //
 // You should see that we hit the breakpoint in `exti0`, and
 // that the code complies to the objdump EXTI disassembly.
@@ -123,14 +145,15 @@ const APP: () = {
 //
 // (gdb) x 0xe0001004
 //
-// [Your answer here]
+// [0x00000025 = 37]
 //
 // You should have a total execution time in the range of 30-40 cycles.
 //
 // Explain the reason (for this case) that resource access in
 // `exti0` was safe without locking the resource.
 //
-// [Your answer here]
+// [It was safe because the priority on exti0 is higher than on exti1. 
+// Which means that exti0 can never be interrupted to run on exti1.]
 //
 // In `exti1` we also access `shared` but this time through a lock.
 //
-- 
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