From c4e661650712d4e6d9afc9021d275ab1b3fa91cf Mon Sep 17 00:00:00 2001 From: rubenasplund <ruben.asplund@hotmail.com> Date: Sat, 5 Dec 2020 18:51:37 +0100 Subject: [PATCH] timing_task done --- examples/timing_task.rs | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/examples/timing_task.rs b/examples/timing_task.rs index e972a8a..a2c7249 100644 --- a/examples/timing_task.rs +++ b/examples/timing_task.rs @@ -81,11 +81,16 @@ const APP: () = { // // (gdb) x 0xe0001004 // -// [Your answer here] +// [0x0000000b = 11] // // (gdb) disassemble // // [Your answer here] +// Dump of assembler code for function timing_task::APP::EXTI0: +// => 0x08000232 <+0>: bkpt 0x0000 +// 0x08000234 <+2>: movs r0, #0 +// 0x08000236 <+4>: msr BASEPRI, r0 +// 0x0800023a <+8>: bx lr // // You should see that we hit the breakpoint in `exti0`, and // that the code complies to the objdump EXTI disassembly. @@ -95,11 +100,12 @@ const APP: () = { // // What was the software latency observed to enter the task? // -// [Your answer here] +// [11 - 0 = 11 clock cycles] // // Does RTIC infer any overhead for launching the task? // -// [Your answer here] +// [It does not have software overhead, +// because in the link to the document above, figure 6 shows that there are no software overhead in cortex-M.] // // Now we can continue to measure the round trip time. // @@ -109,7 +115,7 @@ const APP: () = { // // (gdb) x 0xe0001004 // -// [Your answer here] +// [0x00000017 = 23] // // Looking at the EXTI0 (exti0) code, we see two additional // instructions used to restore the BASEPRI register. -- GitLab