#![deny(unsafe_code)] // #![deny(warnings)] #![no_main] #![no_std] use cortex_m::{iprintln, peripheral::DWT}; use embedded_hal::spi::MODE_3; // use cortex_m_semihosting::hprintln; use panic_halt as _; use rtic::cyccnt::{Instant, U32Ext as _}; use stm32f4xx_hal::{dwt::Dwt, gpio::Speed, prelude::*, rcc::Clocks, spi::Spi, stm32}; //use crate::hal::gpio::{gpioa::PA0, Edge, Input, PullDown}; //use hal::spi::{Mode, Phase, Polarity}; #[rtic::app(device = stm32f4xx_hal::stm32, monotonic = rtic::cyccnt::CYCCNT, peripherals = true)] const APP: () = { struct Resources { // late resources GPIOA: stm32::GPIOA, ITM: stm32::ITM, } #[init(schedule = [toggle])] fn init(cx: init::Context) -> init::LateResources { let mut core = cx.core; let device = cx.device; // Configure led: // power on GPIOA, RM0368 6.3.11 device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit()); // configure PA5 as output, RM0368 8.4.1 device.GPIOA.moder.modify(|_, w| w.moder5().bits(1)); // setup clocks let rcc = device.RCC.constrain(); let clocks = rcc.cfgr.freeze(); let stim = &mut core.ITM.stim[0]; iprintln!(stim, "------------"); iprintln!(stim, "pmw3389"); // Initialize (enable) the monotonic timer (CYCCNT) core.DCB.enable_trace(); // Configure SPI // spi2 // sck - pb10, (yellow) // miso - pc2, (red) // mosi - pc3, (orange) // ncs - pb4, (long yellow) // motion - (brown) // // +5, (white) // gnd, (black) let gpiob = device.GPIOB.split(); let gpioc = device.GPIOC.split(); let sck = gpiob.pb10.into_alternate_af5(); let miso = gpioc.pc2.into_alternate_af5(); let mosi = gpioc.pc3.into_alternate_af5(); let cs = gpiob.pb4.into_push_pull_output().set_speed(Speed::High); // let cs = gpiob.pb4.into_push_pull_output(); let spi = Spi::spi2( device.SPI2, (sck, miso, mosi), MODE_3, stm32f4xx_hal::time::KiloHertz(1000).into(), clocks, ); let mut delay = DwtDelay::new(&mut core.DWT, clocks); iprintln!(stim, "clocks:"); iprintln!(stim, "hclk {}", clocks.hclk().0); // test the delay let t1 = stm32::DWT::get_cycle_count(); delay.delay_us(1000); let t2 = stm32::DWT::get_cycle_count(); iprintln!(stim, "1000us {}", t2.wrapping_sub(t1)); let t1 = stm32::DWT::get_cycle_count(); delay.delay_ms(1000); let t2 = stm32::DWT::get_cycle_count(); iprintln!(stim, "1000ms {}", t2.wrapping_sub(t1)); let mut pmw3389 = pmw3389::Pmw3389::new(spi, cs, delay, &mut core.ITM).unwrap(); let stim = &mut core.ITM.stim[0]; let id = pmw3389.product_id().unwrap(); iprintln!(stim, "id {}", id); let id = pmw3389 .read_register(pmw3389::Register::RevisionId) .unwrap(); iprintln!(stim, "rev {}", id); let id = pmw3389 .read_register(pmw3389::Register::ShutterLower) .unwrap(); iprintln!(stim, "lower {}", id); let id = pmw3389 .read_register(pmw3389::Register::ShutterUpper) .unwrap(); iprintln!(stim, "upper {}", id); let id = pmw3389.read_register(pmw3389::Register::SROMId).unwrap(); iprintln!(stim, "sromid {}", id); let id = pmw3389 .read_register(pmw3389::Register::InverseProductID) .unwrap(); iprintln!(stim, "-id {}", id); let id = pmw3389 .read_register(pmw3389::Register::RippleControl) .unwrap(); iprintln!(stim, "ripple_control {:x}", id); // semantically, the monotonic timer is frozen at time "zero" during `init` // NOTE do *not* call `Instant::now` in this context; it will return a nonsense value // let now = cx.start; // the start time of the system // Schedule `toggle` to run 8e6 cycles (clock cycles) in the future // cx.schedule.toggle(now + 8_000_000.cycles()).unwrap(); // pass on late resources init::LateResources { GPIOA: device.GPIOA, ITM: core.ITM, } } #[task(resources = [GPIOA, ITM], schedule = [toggle])] fn toggle(cx: toggle::Context) { static mut TOGGLE: bool = false; iprintln!(&mut cx.resources.ITM.stim[0], "foo @ {:?}", Instant::now()); if *TOGGLE { cx.resources.GPIOA.bsrr.write(|w| w.bs5().set_bit()); } else { cx.resources.GPIOA.bsrr.write(|w| w.br5().set_bit()); } *TOGGLE = !*TOGGLE; cx.schedule .toggle(cx.scheduled + 8_000_000.cycles()) .unwrap(); } extern "C" { fn EXTI0(); } }; pub struct DwtDelay { clocks: Clocks, } impl DwtDelay { pub fn new(dwt: &mut stm32::DWT, clocks: Clocks) -> DwtDelay { // required on Cortex-M7 devices that software lock the DWT (e.g. STM32F7) stm32::DWT::unlock(); dwt.enable_cycle_counter(); Self { clocks } } } impl _embedded_hal_blocking_delay_DelayUs<u32> for DwtDelay { fn delay_us(&mut self, us: u32) { let freq_m_hertz = self.clocks.hclk().0 / 1_000_000; let start = stm32::DWT::get_cycle_count() as i32; let end = start.wrapping_add((us * freq_m_hertz) as i32); while (stm32::DWT::get_cycle_count() as i32).wrapping_sub(end) < 0 { // this nop should be ok as the `DWT::get_cycle_count() provides side effects } } } impl _embedded_hal_blocking_delay_DelayMs<u32> for DwtDelay { fn delay_ms(&mut self, ms: u32) { self.delay_us(ms * 1000) } } mod pmw3389 { use super::DwtDelay; use cortex_m::{iprint, iprintln}; use embedded_hal::blocking::spi::{Transfer, Write}; use embedded_hal::digital::v2::OutputPin; use stm32f4xx_hal::{prelude::*, stm32}; // use stm32f4xx_hal::{dwt::Dwt, gpio::Speed, prelude::*, rcc::Clocks, spi::Spi, stm32}; #[allow(dead_code)] #[derive(Clone, Copy)] pub enum Register { ProductId = 0x00, RevisionId = 0x01, Motion = 0x02, DeltaXL = 0x03, DeltaXH = 0x04, DeltaYL = 0x05, DeltaYH = 0x06, SQUAL = 0x07, RawDataSum = 0x08, MaximumRawdata = 0x09, MinimumRawdata = 0x0A, ShutterLower = 0x0B, ShutterUpper = 0x0C, RippleControl = 0x0D, ResolutionL = 0x0E, ResolutionH = 0x0F, Config2 = 0x10, AngleTune = 0x11, FrameCapture = 0x12, SROMEnable = 0x13, RunDownshift = 0x14, Rest1RateLower = 0x15, Rest1RateUpper = 0x16, Rest1Downshift = 0x17, Rest2RateLower = 0x18, Rest2RateUpper = 0x19, Rest2Downshift = 0x1A, Rest3RateLower = 0x1B, Rest3RateUpper = 0x1C, Observation = 0x24, DataOutLower = 0x25, DataOutUpper = 0x26, RawDataDump = 0x29, SROMId = 0x2A, MinSQRun = 0x2B, RawDataThreshold = 0x2C, Control2 = 0x2D, Config5L = 0x2E, Config5H = 0x2F, PowerUpReset = 0x3A, Shutdown = 0x3B, InverseProductID = 0x3F, LiftCutoffTune3 = 0x41, AngleSnap = 0x42, LiftCutoffTune1 = 0x4A, MotionBurst = 0x50, LiftCutoffTune1Timeout = 0x58, LiftCutoffTune1MinLength = 0x5A, SROMLoadBurst = 0x62, LiftConfig = 0x63, RawDataBurst = 0x64, LiftCutoffTune2 = 0x65, LiftCutoffTune2Timeout = 0x71, LiftCutoffTune2MinLength = 0x72, PWMPeriodCnt = 0x73, PWMWidthCnt = 0x74, } impl Register { fn addr(self) -> u8 { self as u8 } } pub struct Pmw3389<SPI, CS> { spi: SPI, cs: CS, delay: DwtDelay, } impl<SPI, CS, E> Pmw3389<SPI, CS> where SPI: Transfer<u8, Error = E> + Write<u8, Error = E>, CS: OutputPin, { fn com_begin(&mut self) { self.cs.set_low().ok(); } fn com_end(&mut self) { self.cs.set_high().ok(); } /// Creates a new driver from a SPI peripheral and a NCS pin pub fn new(spi: SPI, cs: CS, delay: DwtDelay, itm: &mut stm32::ITM) -> Result<Self, E> { let mut pmw3389 = Pmw3389 { spi, cs, delay }; iprintln!(&mut itm.stim[0], "pmw3389 - new"); // ensure SPI is reset pmw3389.com_end(); pmw3389.delay.delay_us(40); pmw3389.com_begin(); pmw3389.delay.delay_us(40); pmw3389.com_end(); // read product id let id = pmw3389.product_id()?; iprintln!(&mut itm.stim[0], "product_id 0x{:x}", id); let srom_id = pmw3389.read_register(Register::SROMId)?; iprintln!(&mut itm.stim[0], "srom_id {}, 0x{:x}", srom_id, srom_id); iprintln!(&mut itm.stim[0], "reset"); // shutdown // adns_write_reg(Shutdown, 0xb6); // Shutdown first // delay(300); // adns_com_begin(); // drop and raise ncs to reset spi port // delayMicroseconds(40); // adns_com_end(); // delayMicroseconds(40); // pmw3389.write_register(Register::Shutdown, 0xb6)?; // pmw3389.delay.delay_ms(300); // pmw3389.com_begin(); // pmw3389.delay.delay_us(40); // pmw3389.com_end(); // pmw3389.delay.delay_us(40); // force reset pmw3389.write_register(Register::PowerUpReset, 0x5a)?; // wait for reboot pmw3389.delay.delay_ms(50); // read product id let id = pmw3389.product_id()?; iprintln!(&mut itm.stim[0], "product_id 0x{:x}", id); let srom_id = pmw3389.read_register(Register::SROMId)?; iprintln!(&mut itm.stim[0], "srom_id {}, 0x{:x}", srom_id, srom_id); // read registers 0x02 to 0x06 (and discard the data) pmw3389.read_register(Register::Motion)?; pmw3389.read_register(Register::DeltaXL)?; pmw3389.read_register(Register::DeltaXH)?; pmw3389.read_register(Register::DeltaYL)?; pmw3389.read_register(Register::DeltaYH)?; pmw3389.upload_firmware(itm)?; pmw3389.delay.delay_ms(1000); iprintln!(&mut itm.stim[0], "Optical Chip Initialized"); // read product id let id = pmw3389.product_id()?; iprintln!(&mut itm.stim[0], "product_id 0x{:x}", id); let srom_id = pmw3389.read_register(Register::SROMId)?; iprintln!(&mut itm.stim[0], "srom_id {}, 0x{:x}", srom_id, srom_id); loop { pmw3389.write_register(Register::Motion, 0x01)?; let motion = pmw3389.read_register(Register::Motion)?; let xl = pmw3389.read_register(Register::DeltaXL)?; let xh = pmw3389.read_register(Register::DeltaXH)?; let yl = pmw3389.read_register(Register::DeltaYL)?; let yh = pmw3389.read_register(Register::DeltaYH)?; let x = (xl as u16 + (xh as u16) << 8) as i16; let y = (yl as u16 + (yh as u16) << 8) as i16; let surface = motion & 0x08; let motion_detect = motion & 0x80; iprintln!( &mut itm.stim[0], "motion {}, surface {}, (x, y) {:?}", motion_detect, surface, (x, y), ); pmw3389.delay.delay_ms(200); } // self.spi.transfer(&mut [Register::MotionBurst.addr()])?; // self.delay.delay_ms(35); // waits for tSRAD // loop { // pmw3389.read_status(itm)?; // pmw3389.delay.delay_ms(10); // } // Ok(pmw3389) } pub fn read_register(&mut self, reg: Register) -> Result<u8, E> { self.com_begin(); let mut buffer = [reg.addr() & 0x7f]; self.spi.transfer(&mut buffer)?; // tSRAD self.delay.delay_us(100); self.delay.delay_us(120); let mut buffer = [0]; self.spi.transfer(&mut buffer)?; // tSCLK-NCS for read operation is 120ns self.delay.delay_us(1); self.com_end(); // tSRW/tSRR (=20us) minus tSCLK-NCS self.delay.delay_us(19); self.delay.delay_us(120); Ok(buffer[0]) } pub fn write_register(&mut self, reg: Register, byte: u8) -> Result<(), E> { self.com_begin(); let mut buffer = [reg.addr() | 0x80]; self.spi.transfer(&mut buffer)?; // send let mut buffer = [byte]; self.spi.transfer(&mut buffer)?; // tSCLK-NCS for write operation self.delay.delay_us(20); self.com_end(); // tSWW/tSWR (=120us) minus tSCLK-NCS. // Could be shortened, but is looks like a safe lower bound self.delay.delay_us(100); Ok(()) } /// Reads the ProductId register; should return `0x47` pub fn product_id(&mut self) -> Result<u8, E> { self.read_register(Register::ProductId) } /// Read status pub fn read_status(&mut self, itm: &mut stm32::ITM) -> Result<(), E> { self.com_begin(); self.spi.transfer(&mut [Register::MotionBurst.addr()])?; self.delay.delay_us(35); // waits for tSRAD // read burst buffer let mut buf = [0u8; 12]; self.spi.transfer(&mut buf)?; // tSCLK-NCS for read operation is 120ns self.delay.delay_us(120); self.com_end(); iprint!(&mut itm.stim[0], "burst ["); for j in buf.iter() { iprint!(&mut itm.stim[0], "0x{:02x}, ", j); } iprintln!(&mut itm.stim[0], "]"); // SPI.endTransaction(); // Per:Not sure what it does // /* // BYTE[00] = Motion = if the 7th bit is 1, a motion is detected. // ==> 7 bit: MOT (1 when motion is detected) // ==> 3 bit: 0 when chip is on surface / 1 when off surface // ] = Observation // BYTE[02] = Delta_X_L = dx (LSB) // BYTE[03] = Delta_X_H = dx (MSB) // BYTE[04] = Delta_Y_L = dy (LSB) // BYTE[05] = Delta_Y_H = dy (MSB) // BYTE[06] = SQUAL = Surface Quality register, max 0x80 // - Number of features on the surface = SQUAL * 8 // BYTE[07] = Raw_Data_Sum = It reports the upper byte of an 18‐bit counter which sums all 1296 raw data in the current frame; // * Avg value = Raw_Data_Sum * 1024 / 1296 // BYTE[08] = Maximum_Raw_Data = Max raw data value in current frame, max=127 // BYTE[09] = Minimum_Raw_Data = Min raw data value in current frame, max=127 // BYTE[10] = Shutter_Upper = Shutter LSB // BYTE[11] = Shutter_Lower = Shutter MSB, Shutter = shutter is adjusted to keep the average raw data values within normal operating ranges // */ // int motion = (burstBuffer[0] & 0x80) > 0; let motion = buf[0] & 0x80; let surface = buf[0] & 0x08; // 0 if on surface / 1 if off surface let x = buf[2] as u16 + (buf[3] as u16) << 8; let y = buf[4] as u16 + (buf[5] as u16) << 8; let squal = buf[6]; iprintln!( &mut itm.stim[0], "motion {}, surface {}, (x, y) {:?}, squal {}", motion, surface, (x, y), squal ); Ok(()) } // Upload the firmware pub fn upload_firmware(&mut self, itm: &mut stm32::ITM) -> Result<(), E> { let stim = &mut itm.stim[0]; // send the firmware to the chip, cf p.18 of the datasheet // Serial.println("Uploading firmware..."); iprintln!(stim, "Uploading firmware..."); //Write 0 to Rest_En bit of Config2 register to disable Rest mode. // adns_write_reg(Config2, 0x20); // is this correct? self.write_register(Register::Config2, 0x00)?; // write 0x1d in SROM_enable reg for initializing // adns_write_reg(SROM_Enable, 0x1d); self.write_register(Register::SROMEnable, 0x1d)?; // wait for more than one frame period // delay(10); // assume that the frame rate is as low as 100fps... // even if it should never be that low self.delay.delay_ms(10); // write 0x18 to SROM_enable to start SROM download // adns_write_reg(SROM_Enable, 0x18); self.write_register(Register::SROMEnable, 0x18)?; iprintln!(stim, "Begin transfer..."); // write the SROM file (=firmware data) // adns_com_begin(); self.com_begin(); // write burst destination address // SPI.transfer(SROM_Load_Burst | 0x80); // write burst destination address // delayMicroseconds(15); self.spi .transfer(&mut [Register::SROMLoadBurst.addr() | 0x80])?; self.delay.delay_us(15); // send all bytes of the firmware // unsigned char c; // for(int i = 0; i < firmware_length; i++){ // c = (unsigned char)pgm_read_byte(firmware_data + i); // SPI.transfer(c); // delayMicroseconds(15); // } for i in FIRMWARE.iter() { let mut buff = [*i]; // iprintln!(stim, "0x{:x}", buff[0]); self.spi.transfer(&mut buff)?; self.delay.delay_us(15); // 15 } // // Per: added this, seems adequate self.delay.delay_us(105); self.com_end(); //Read the SROM_ID register to verify the ID before any other register reads or writes. // adns_read_reg(SROM_ID); let srom_id = self.read_register(Register::SROMId)?; iprintln!(stim, "srom_id {}, 0x{:x}", srom_id, srom_id); // //Write 0x00 to Config2 register for wired mouse or 0x20 for wireless mouse design. // // adns_write_reg(Config2, 0x00); self.write_register(Register::Config2, 0x20)?; // // set initial CPI resolution // // adns_write_reg(Config1, 0x15); // self.write_register(Register::ResolutionL, 0x15)?; self.write_register(Register::ResolutionL, 0x5)?; // self.write_register(Register::ResolutionH, 0x15)?; self.write_register(Register::ResolutionH, 0x00)?; // adns_com_end(); // why the CS is already high self.com_end(); Ok(()) } } // const unsigned char firmware_data[] PROGMEM const FIRMWARE: [u8; 4094] = [ 0x01, 0xe8, 0xba, 0x26, 0x0b, 0xb2, 0xbe, 0xfe, 0x7e, 0x5f, 0x3c, 0xdb, 0x15, 0xa8, 0xb3, 0xe4, 0x2b, 0xb5, 0xe8, 0x53, 0x07, 0x6d, 0x3b, 0xd1, 0x20, 0xc2, 0x06, 0x6f, 0x3d, 0xd9, 0x11, 0xa0, 0xc2, 0xe7, 0x2d, 0xb9, 0xd1, 0x20, 0xa3, 0xa5, 0xc8, 0xf3, 0x64, 0x4a, 0xf7, 0x4d, 0x18, 0x93, 0xa4, 0xca, 0xf7, 0x6c, 0x5a, 0x36, 0xee, 0x5e, 0x3e, 0xfe, 0x7e, 0x7e, 0x5f, 0x1d, 0x99, 0xb0, 0xc3, 0xe5, 0x29, 0xd3, 0x03, 0x65, 0x48, 0x12, 0x87, 0x6d, 0x58, 0x32, 0xe6, 0x2f, 0xdc, 0x3a, 0xf2, 0x4f, 0xfd, 0x59, 0x11, 0x81, 0x61, 0x21, 0xc0, 0x02, 0x86, 0x8e, 0x7f, 0x5d, 0x38, 0xf2, 0x47, 0x0c, 0x7b, 0x55, 0x28, 0xb3, 0xe4, 0x4a, 0x16, 0xab, 0xbf, 0xdd, 0x38, 0xf2, 0x66, 0x4e, 0xff, 0x5d, 0x19, 0x91, 0xa0, 0xa3, 0xa5, 0xc8, 0x12, 0xa6, 0xaf, 0xdc, 0x3a, 0xd1, 0x41, 0x60, 0x75, 0x58, 0x24, 0x92, 0xd4, 0x72, 0x6c, 0xe0, 0x2f, 0xfd, 0x23, 0x8d, 0x1c, 0x5b, 0xb2, 0x97, 0x36, 0x3d, 0x0b, 0xa2, 0x49, 0xb1, 0x58, 0xf2, 0x1f, 0xc0, 0xcb, 0xf8, 0x41, 0x4f, 0xcd, 0x1e, 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