From 407df3381210fb0ab09d98dbb825f7c622c367e1 Mon Sep 17 00:00:00 2001
From: Per Lindgren <per.lindgren@ltu.se>
Date: Fri, 12 Jan 2018 23:52:03 +0100
Subject: [PATCH] CPU added
---
STM32F429x.svd | 11 +++++++++++
src/lib.rs | 2 ++
2 files changed, 13 insertions(+)
diff --git a/STM32F429x.svd b/STM32F429x.svd
index 6a8e699..2fe578c 100644
--- a/STM32F429x.svd
+++ b/STM32F429x.svd
@@ -5,6 +5,17 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
<name>STM32F429x</name>
<version>1.0</version>
<description>STM32F429x</description>
+ <cpu>
+ <name>CM4</name>
+ <revision>r0p0</revision>
+ <endian>little</endian>
+ <fpuPresent>true</fpuPresent>
+ <mpuPresent>true</mpuPresent>
+ <vtorPresent>true</vtorPresent>
+ <nvicPrioBits>4</nvicPrioBits>
+ <vendorSystickConfig>false</vendorSystickConfig>
+ </cpu>
+
<!--Bus Interface Properties-->
<!--Cortex-M4 is byte addressable-->
<addressUnitBits>8</addressUnitBits>
diff --git a/src/lib.rs b/src/lib.rs
index 32b3a44..fab61f4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -7,6 +7,8 @@ extern crate cortex_m_rt;
extern crate vcell;
use core::ops::Deref;
use bare_metal::Peripheral;
+#[doc = r" Number available in the NVIC for configuring priority"]
+pub const NVIC_PRIO_BITS: u8 = 4;
pub use interrupt::Interrupt;
#[doc(hidden)]
pub mod interrupt {
--
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