diff --git a/STM32F429x.svd b/STM32F429x.svd
index 6a8e699f0b3668e853418c75e7e76b6fdd0e8f0a..2fe578cc1e3211a38394f10c7a19664db4c4aada 100644
--- a/STM32F429x.svd
+++ b/STM32F429x.svd
@@ -5,6 +5,17 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
   <name>STM32F429x</name>
   <version>1.0</version>
   <description>STM32F429x</description>
+  <cpu>
+    <name>CM4</name>
+    <revision>r0p0</revision>
+    <endian>little</endian>
+    <fpuPresent>true</fpuPresent>
+    <mpuPresent>true</mpuPresent>
+    <vtorPresent>true</vtorPresent>
+    <nvicPrioBits>4</nvicPrioBits>
+    <vendorSystickConfig>false</vendorSystickConfig>
+  </cpu>
+
   <!--Bus Interface Properties-->
   <!--Cortex-M4 is byte addressable-->
   <addressUnitBits>8</addressUnitBits>
diff --git a/src/lib.rs b/src/lib.rs
index 32b3a449464dc5db98e66e68d47372356cff0134..fab61f4408bd025fe087e9f71cc66d78942e8ea9 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -7,6 +7,8 @@ extern crate cortex_m_rt;
 extern crate vcell;
 use core::ops::Deref;
 use bare_metal::Peripheral;
+#[doc = r" Number available in the NVIC for configuring priority"]
+pub const NVIC_PRIO_BITS: u8 = 4;
 pub use interrupt::Interrupt;
 #[doc(hidden)]
 pub mod interrupt {